| Message ID | 20200930095321.2006-1-zhaolichang@huawei.com |
|---|---|
| Headers | show |
| Series | fix some comment spelling errors | expand |
On 9/30/20 11:53 AM, zhaolichang wrote: > I found that there are many spelling errors in the comments of qemu/target/. > I used spellcheck to check the spelling errors and found some errors in the folder. > > The checkpatch.pl file in the Linux kernel can check spelling errors in patches. > I'm trying to add this function to the checkpatch.pl in qemu, > so that no similar spelling errors will occur in the feture. > It's not done yet and I will commit the patch when it's done. > > Signed-off-by: zhaolichang <zhaolichang@huawei.com> BTW your git-config is still messy, maybe you missed my previous comment: https://www.mail-archive.com/qemu-devel@nongnu.org/msg741642.html
On Wednesday, 2020-09-30 at 17:53:08 +08, zhaolichang wrote: > I found that there are many spelling errors in the comments of qemu/target/cris. > I used spellcheck to check the spelling errors and found some errors in the folder. > > Signed-off-by: zhaolichang <zhaolichang@huawei.com> With the correction below... Reviewed-by: David Edmondson <david.edmondson@oracle.com> > --- > target/cris/helper.c | 6 +++--- > target/cris/op_helper.c | 2 +- > target/cris/translate.c | 14 +++++++------- > 3 files changed, 11 insertions(+), 11 deletions(-) > > diff --git a/target/cris/helper.c b/target/cris/helper.c > index b5159b8..50419e7 100644 > --- a/target/cris/helper.c > +++ b/target/cris/helper.c > @@ -141,7 +141,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs) > assert(!(env->pregs[PR_CCS] & PFIX_FLAG)); > switch (cs->exception_index) { > case EXCP_BREAK: > - /* These exceptions are genereated by the core itself. > + /* These exceptions are generated by the core itself. > ERP should point to the insn following the brk. */ > ex_vec = env->trap_vector; > env->pregs[PRV10_BRP] = env->pc; > @@ -197,7 +197,7 @@ void cris_cpu_do_interrupt(CPUState *cs) > > switch (cs->exception_index) { > case EXCP_BREAK: > - /* These exceptions are genereated by the core itself. > + /* These exceptions are generated by the core itself. > ERP should point to the insn following the brk. */ > ex_vec = env->trap_vector; > env->pregs[PR_ERP] = env->pc; > @@ -256,7 +256,7 @@ void cris_cpu_do_interrupt(CPUState *cs) > undefined. */ > env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); > > - /* Clear the excption_index to avoid spurios hw_aborts for recursive > + /* Clear the excption_index to avoid spurious hw_aborts for recursive "exception_index" > bus faults. */ > cs->exception_index = -1; > > diff --git a/target/cris/op_helper.c b/target/cris/op_helper.c > index 6b1e7ae..3c4aacc 100644 > --- a/target/cris/op_helper.c > +++ b/target/cris/op_helper.c > @@ -231,7 +231,7 @@ static inline uint32_t evaluate_flags_writeback(CPUCRISState *env, > { > unsigned int x, z, mask; > > - /* Extended arithmetics, leave the z flag alone. */ > + /* Extended arithmetic, leave the z flag alone. */ > x = env->cc_x; > mask = env->cc_mask | X_FLAG; > if (x) { > diff --git a/target/cris/translate.c b/target/cris/translate.c > index c312e6f..16b0ef8 100644 > --- a/target/cris/translate.c > +++ b/target/cris/translate.c > @@ -348,7 +348,7 @@ static void t_gen_cris_mstep(TCGv d, TCGv a, TCGv b, TCGv ccs) > tcg_temp_free(t); > } > > -/* Extended arithmetics on CRIS. */ > +/* Extended arithmetic on CRIS. */ > static inline void t_gen_add_flag(TCGv d, int flag) > { > TCGv c; > @@ -725,7 +725,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op, > switch (op) { > case CC_OP_ADD: > tcg_gen_add_tl(dst, a, b); > - /* Extended arithmetics. */ > + /* Extended arithmetic. */ > t_gen_addx_carry(dc, dst); > break; > case CC_OP_ADDC: > @@ -738,7 +738,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op, > break; > case CC_OP_SUB: > tcg_gen_sub_tl(dst, a, b); > - /* Extended arithmetics. */ > + /* Extended arithmetic. */ > t_gen_subx_carry(dc, dst); > break; > case CC_OP_MOVE: > @@ -764,7 +764,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op, > break; > case CC_OP_NEG: > tcg_gen_neg_tl(dst, b); > - /* Extended arithmetics. */ > + /* Extended arithmetic. */ > t_gen_subx_carry(dc, dst); > break; > case CC_OP_LZ: > @@ -787,7 +787,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op, > break; > case CC_OP_CMP: > tcg_gen_sub_tl(dst, a, b); > - /* Extended arithmetics. */ > + /* Extended arithmetic. */ > t_gen_subx_carry(dc, dst); > break; > default: > @@ -3053,12 +3053,12 @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc) > * On QEMU care needs to be taken when a branch+delayslot sequence is broken > * and the branch and delayslot don't share pages. > * > - * The TB contaning the branch insn will set up env->btarget and evaluate > + * The TB containing the branch insn will set up env->btarget and evaluate > * env->btaken. When the translation loop exits we will note that the branch > * sequence is broken and let env->dslot be the size of the branch insn (those > * vary in length). > * > - * The TB contaning the delayslot will have the PC of its real insn (i.e no lsb > + * The TB containing the delayslot will have the PC of its real insn (i.e no lsb > * set). It will also expect to have env->dslot setup with the size of the > * delay slot so that env->pc - env->dslot point to the branch insn. This TB > * will execute the dslot and take the branch, either to btarget or just one > -- > 2.26.2.windows.1 dme.
On Wednesday, 2020-09-30 at 17:53:12 +08, zhaolichang wrote: > I found that there are many spelling errors in the comments of qemu/target/tricore. > I used spellcheck to check the spelling errors and found some errors in the folder. > > Signed-off-by: zhaolichang <zhaolichang@huawei.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> > --- > target/s390x/ioinst.c | 2 +- > target/tricore/csfr.def | 2 +- > target/tricore/translate.c | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c > index a412926..c576d85 100644 > --- a/target/s390x/ioinst.c > +++ b/target/s390x/ioinst.c > @@ -279,7 +279,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, > /* > * As operand exceptions have a lower priority than access exceptions, > * we check whether the memory area is writeable (injecting the > - * access execption if it is not) first. > + * access exception if it is not) first. > */ > if (!s390_cpu_virt_mem_check_write(cpu, addr, ar, sizeof(schib))) { > s390_program_interrupt(env, PGM_OPERAND, ra); > diff --git a/target/tricore/csfr.def b/target/tricore/csfr.def > index ff004cb..cdfaf1d 100644 > --- a/target/tricore/csfr.def > +++ b/target/tricore/csfr.def > @@ -1,4 +1,4 @@ > -/* A(ll) access permited > +/* A(ll) access permitted > R(ead only) access > E(nd init protected) access > > diff --git a/target/tricore/translate.c b/target/tricore/translate.c > index 7752630..c9c420d 100644 > --- a/target/tricore/translate.c > +++ b/target/tricore/translate.c > @@ -397,7 +397,7 @@ static inline void gen_mfcr(DisasContext *ctx, TCGv ret, int32_t offset) > #undef E > > #define R(ADDRESS, REG, FEATURE) /* don't gen writes to read-only reg, > - since no execption occurs */ > + since no exception occurs */ > #define A(ADDRESS, REG, FEATURE) R(ADDRESS, REG, FEATURE) \ > case ADDRESS: \ > if (has_feature(ctx, FEATURE)) { \ > -- > 2.26.2.windows.1 dme.
On 9/30/20 11:53 AM, zhaolichang wrote: > I found that there are many spelling errors in the comments of qemu/target/alpha. > I used spellcheck to check the spelling errors and found some errors in the folder. > > Signed-off-by: zhaolichang <zhaolichang@huawei.com> > --- > target/alpha/cpu.h | 4 ++-- > target/alpha/translate.c | 2 +- > 2 files changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
I found that there are many spelling errors in the comments of qemu/target/. I used spellcheck to check the spelling errors and found some errors in the folder. The checkpatch.pl file in the Linux kernel can check spelling errors in patches. I'm trying to add this function to the checkpatch.pl in qemu, so that no similar spelling errors will occur in the feture. It's not done yet and I will commit the patch when it's done. Signed-off-by: zhaolichang <zhaolichang@huawei.com> zhaolichang (14): cris/: fix some comment spelling errors ppc/: fix some comment spelling errors riscv/: fix some comment spelling errors rx/: fix some comment spelling errors tricore/: fix some comment spelling errors mips/: fix some comment spelling errors s390x/: fix some comment spelling errors m68k/: fix some comment spelling errors sh4/: fix some comment spelling errors i386/: fix some comment spelling errors avr/: fix some comment spelling errors arm/: fix some comment spelling errors alpha/: fix some comment spelling errors target/: fix some comment spelling errors target/alpha/cpu.h | 4 ++-- target/alpha/translate.c | 2 +- target/arm/cpu.h | 2 +- target/arm/helper.c | 4 ++-- target/arm/m_helper.c | 2 +- target/arm/translate-a64.c | 4 ++-- target/arm/translate-sve.c | 2 +- target/avr/helper.c | 6 +++--- target/cris/helper.c | 6 +++--- target/cris/op_helper.c | 2 +- target/cris/translate.c | 14 +++++++------- target/i386/cpu.c | 4 ++-- target/i386/hax-interface.h | 4 ++-- target/i386/hax-windows.c | 2 +- target/i386/kvm.c | 2 +- target/i386/machine.c | 6 +++--- target/i386/translate.c | 8 ++++---- target/i386/whpx-all.c | 2 +- target/m68k/translate.c | 16 ++++++++-------- target/mips/internal.h | 2 +- target/mips/translate.c | 10 +++++----- target/mips/translate_init.c.inc | 2 +- target/openrisc/cpu.h | 2 +- target/ppc/cpu.h | 6 +++--- target/ppc/excp_helper.c | 6 +++--- target/ppc/fpu_helper.c | 2 +- target/ppc/internal.h | 2 +- target/ppc/kvm.c | 2 +- target/ppc/machine.c | 2 +- target/ppc/mmu-hash64.c | 2 +- target/ppc/mmu_helper.c | 4 ++-- target/ppc/translate_init.c.inc | 2 +- target/riscv/cpu.c | 2 +- target/riscv/cpu_bits.h | 2 +- target/riscv/csr.c | 6 +++--- target/riscv/vector_helper.c | 2 +- target/rx/op_helper.c | 2 +- target/rx/translate.c | 2 +- target/s390x/cpu_models.h | 4 ++-- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 2 +- target/s390x/insn-data.def | 2 +- target/s390x/ioinst.c | 2 +- target/s390x/misc_helper.c | 2 +- target/s390x/translate.c | 4 ++-- target/s390x/translate_vx.c.inc | 2 +- target/sh4/cpu.h | 2 +- target/sh4/op_helper.c | 2 +- target/sh4/translate.c | 2 +- target/sparc/asi.h | 2 +- target/tricore/csfr.def | 2 +- target/tricore/translate.c | 2 +- target/unicore32/translate.c | 2 +- 53 files changed, 93 insertions(+), 93 deletions(-)