| Message ID | 20200914000153.1725632-12-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | capstone + disassembler patches | expand |
+SPARC maintainers On 9/14/20 2:01 AM, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > disas.c | 2 ++ > target/sparc/cpu.c | 4 ++++ > meson.build | 10 ++++++++++ > 3 files changed, 16 insertions(+) > > diff --git a/disas.c b/disas.c > index 5e943181d8..b71d06d890 100644 > --- a/disas.c > +++ b/disas.c > @@ -196,6 +196,8 @@ static void initialize_debug_host(CPUDebug *s) > #elif defined(__sparc__) > s->info.print_insn = print_insn_sparc; > s->info.mach = bfd_mach_sparc_v9b; > + s->info.cap_arch = CS_ARCH_SPARC; > + s->info.cap_mode = CS_MODE_V9; > #elif defined(__arm__) > /* TCG only generates code for arm mode. */ > s->info.print_insn = print_insn_arm; > diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c > index cf21efd85f..e0b0a88d26 100644 > --- a/target/sparc/cpu.c > +++ b/target/sparc/cpu.c > @@ -25,6 +25,8 @@ > #include "exec/exec-all.h" > #include "hw/qdev-properties.h" > #include "qapi/visitor.h" > +#include "disas/capstone.h" > + > > //#define DEBUG_FEATURES > > @@ -100,8 +102,10 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) > static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info) > { > info->print_insn = print_insn_sparc; > + info->cap_arch = CS_ARCH_SPARC; > #ifdef TARGET_SPARC64 > info->mach = bfd_mach_sparc_v9b; > + info->cap_mode = CS_MODE_V9; > #endif > } > > diff --git a/meson.build b/meson.build > index 82cf4a9258..b1c54024ac 100644 > --- a/meson.build > +++ b/meson.build > @@ -661,6 +661,16 @@ else > ) > endif > > + if 'CONFIG_SPARC_DIS' in config_all_disas > + capstone_data.set('CAPSTONE_HAS_SPARC', '1') > + capstone_files += files( > + 'capstone/arch/Sparc/SparcDisassembler.c', > + 'capstone/arch/Sparc/SparcInstPrinter.c', > + 'capstone/arch/Sparc/SparcMapping.c', > + 'capstone/arch/Sparc/SparcModule.c' > + ) > + endif > + > if 'CONFIG_S390_DIS' in config_all_disas > capstone_data.set('CAPSTONE_HAS_SYSZ', '1') > capstone_files += files( > The old disassembler is easier to follow: ---------------- IN: -0x4000d214: lda [ %g3 ] #ASI_M_FLUSH_PROBE, %g6 -0x4000d218: sta %g6, [ %g4 ] #ASI_M_FLUSH_PROBE +0x4000d214: cc80c060 .byte 0xcc, 0x80, 0xc0, 0x60 +0x4000d218: cca10060 .byte 0xcc, 0xa1, 0x00, 0x60 ^ lda/sta opcodes not supported (there might be more). ---------------- IN: -0x4000d22c: sethi %hi(0xf01f0000), %g1 -0x4000d230: mov %g1, %g1 ! 0xf01f0000 -0x4000d234: jmp %g1 -0x4000d238: nop +0x4000d22c: 033c07c0 sethi 0x3c07c0, %g1 +0x4000d230: 82106000 or %g1, 0, %g1 +0x4000d234: 81c04000 jmp %g1 +0x4000d238: 01000000 nop ^ hi()/lo() macros not expanded (easier to read!) Can we restrict dumping the encoded hex content for debug profile only? Anyhow: Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
On 9/13/20 11:23 PM, Philippe Mathieu-Daudé wrote: > The old disassembler is easier to follow: > > ---------------- > IN: > -0x4000d214: lda [ %g3 ] #ASI_M_FLUSH_PROBE, %g6 > -0x4000d218: sta %g6, [ %g4 ] #ASI_M_FLUSH_PROBE > +0x4000d214: cc80c060 .byte 0xcc, 0x80, 0xc0, 0x60 > +0x4000d218: cca10060 .byte 0xcc, 0xa1, 0x00, 0x60 > > ^ lda/sta opcodes not supported (there might be more). > > ---------------- > IN: > -0x4000d22c: sethi %hi(0xf01f0000), %g1 > -0x4000d230: mov %g1, %g1 ! 0xf01f0000 > -0x4000d234: jmp %g1 > -0x4000d238: nop > +0x4000d22c: 033c07c0 sethi 0x3c07c0, %g1 > +0x4000d230: 82106000 or %g1, 0, %g1 > +0x4000d234: 81c04000 jmp %g1 > +0x4000d238: 01000000 nop > > ^ hi()/lo() macros not expanded (easier to read!) Hmm, yes. I'm going to drop this for now. Maybe revisit if this gets fixed upstream. > Can we restrict dumping the encoded hex content for debug > profile only? Why? Including the hex content was in fact requested when I first added the capstone code. r~
On 9/14/20 11:07 PM, Richard Henderson wrote: > On 9/13/20 11:23 PM, Philippe Mathieu-Daudé wrote: >> The old disassembler is easier to follow: >> >> ---------------- >> IN: >> -0x4000d214: lda [ %g3 ] #ASI_M_FLUSH_PROBE, %g6 >> -0x4000d218: sta %g6, [ %g4 ] #ASI_M_FLUSH_PROBE >> +0x4000d214: cc80c060 .byte 0xcc, 0x80, 0xc0, 0x60 >> +0x4000d218: cca10060 .byte 0xcc, 0xa1, 0x00, 0x60 >> >> ^ lda/sta opcodes not supported (there might be more). >> >> ---------------- >> IN: >> -0x4000d22c: sethi %hi(0xf01f0000), %g1 >> -0x4000d230: mov %g1, %g1 ! 0xf01f0000 >> -0x4000d234: jmp %g1 >> -0x4000d238: nop >> +0x4000d22c: 033c07c0 sethi 0x3c07c0, %g1 >> +0x4000d230: 82106000 or %g1, 0, %g1 >> +0x4000d234: 81c04000 jmp %g1 >> +0x4000d238: 01000000 nop >> >> ^ hi()/lo() macros not expanded (easier to read!) > > Hmm, yes. I'm going to drop this for now. > Maybe revisit if this gets fixed upstream. > >> Can we restrict dumping the encoded hex content for debug >> profile only? > > Why? Including the hex content was in fact requested when I first added the > capstone code. Ah, OK. Now I wonder if I hadn't asked you the same when you introduced capstone :) Maybe we could include the hex content in the current disas.c as a first step, that would ease diffing for missing opcodes.
diff --git a/disas.c b/disas.c index 5e943181d8..b71d06d890 100644 --- a/disas.c +++ b/disas.c @@ -196,6 +196,8 @@ static void initialize_debug_host(CPUDebug *s) #elif defined(__sparc__) s->info.print_insn = print_insn_sparc; s->info.mach = bfd_mach_sparc_v9b; + s->info.cap_arch = CS_ARCH_SPARC; + s->info.cap_mode = CS_MODE_V9; #elif defined(__arm__) /* TCG only generates code for arm mode. */ s->info.print_insn = print_insn_arm; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index cf21efd85f..e0b0a88d26 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -25,6 +25,8 @@ #include "exec/exec-all.h" #include "hw/qdev-properties.h" #include "qapi/visitor.h" +#include "disas/capstone.h" + //#define DEBUG_FEATURES @@ -100,8 +102,10 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info) { info->print_insn = print_insn_sparc; + info->cap_arch = CS_ARCH_SPARC; #ifdef TARGET_SPARC64 info->mach = bfd_mach_sparc_v9b; + info->cap_mode = CS_MODE_V9; #endif } diff --git a/meson.build b/meson.build index 82cf4a9258..b1c54024ac 100644 --- a/meson.build +++ b/meson.build @@ -661,6 +661,16 @@ else ) endif + if 'CONFIG_SPARC_DIS' in config_all_disas + capstone_data.set('CAPSTONE_HAS_SPARC', '1') + capstone_files += files( + 'capstone/arch/Sparc/SparcDisassembler.c', + 'capstone/arch/Sparc/SparcInstPrinter.c', + 'capstone/arch/Sparc/SparcMapping.c', + 'capstone/arch/Sparc/SparcModule.c' + ) + endif + if 'CONFIG_S390_DIS' in config_all_disas capstone_data.set('CAPSTONE_HAS_SYSZ', '1') capstone_files += files(
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- disas.c | 2 ++ target/sparc/cpu.c | 4 ++++ meson.build | 10 ++++++++++ 3 files changed, 16 insertions(+) -- 2.25.1