| Message ID | 20200706112653.18951-1-patrick.delaunay@st.com |
|---|---|
| State | Accepted |
| Commit | 6ed83edfc006b1ca8e8848442ecf79bac8de4e80 |
| Headers | show |
| Series | [1/3] ARM: dts: rename stm32mp15xx-avenger96 ethernet0_rgmii_pins | expand |
On 7/6/20 1:26 PM, Patrick Delaunay wrote: > Alignment with pins name used in Linux kernel v5.8. > > It is a preleminary step for device tree alignment. > > Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> > --- > > arch/arm/dts/stm32mp15-pinctrl.dtsi | 4 ++-- > arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 4 ++-- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi > index c385896ebc..b0c2aa52f8 100644 > --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi > +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi > @@ -162,7 +162,7 @@ > }; > }; > > - ethernet0_rgmii_pins_b: rgmii-1 { > + ethernet0_rgmii_pins_c: rgmii-2 { > pins1 { > pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ > <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ > @@ -193,7 +193,7 @@ > }; > }; > > - ethernet0_rgmii_pins_sleep_b: rgmii-sleep-1 { > + ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 { > pins1 { > pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ > <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ > diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts > index c1cc80bcf5..88f25d89b2 100644 > --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts > +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts > @@ -89,8 +89,8 @@ > > ðernet0 { > status = "okay"; > - pinctrl-0 = <ðernet0_rgmii_pins_b>; > - pinctrl-1 = <ðernet0_rgmii_pins_sleep_b>; > + pinctrl-0 = <ðernet0_rgmii_pins_c>; > + pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; > pinctrl-names = "default", "sleep"; > phy-mode = "rgmii"; > max-speed = <1000>; Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Thanks Patrice
On 7/6/20 1:26 PM, Patrick Delaunay wrote: > Alignment with pins name used in Linux kernel v5.8. > > It is a preleminary step for device tree alignment. > > Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> > --- > > arch/arm/dts/stm32mp15-pinctrl.dtsi | 4 ++-- > arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 4 ++-- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi > index c385896ebc..b0c2aa52f8 100644 > --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi > +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi > @@ -162,7 +162,7 @@ > }; > }; > > - ethernet0_rgmii_pins_b: rgmii-1 { > + ethernet0_rgmii_pins_c: rgmii-2 { > pins1 { > pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ > <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ > @@ -193,7 +193,7 @@ > }; > }; > > - ethernet0_rgmii_pins_sleep_b: rgmii-sleep-1 { > + ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 { > pins1 { > pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ > <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ > diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts > index c1cc80bcf5..88f25d89b2 100644 > --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts > +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts > @@ -89,8 +89,8 @@ > > ðernet0 { > status = "okay"; > - pinctrl-0 = <ðernet0_rgmii_pins_b>; > - pinctrl-1 = <ðernet0_rgmii_pins_sleep_b>; > + pinctrl-0 = <ðernet0_rgmii_pins_c>; > + pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; > pinctrl-names = "default", "sleep"; > phy-mode = "rgmii"; > max-speed = <1000>; Applied to u-boot-stm/master Thanks Patrice
diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index c385896ebc..b0c2aa52f8 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -162,7 +162,7 @@ }; }; - ethernet0_rgmii_pins_b: rgmii-1 { + ethernet0_rgmii_pins_c: rgmii-2 { pins1 { pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ @@ -193,7 +193,7 @@ }; }; - ethernet0_rgmii_pins_sleep_b: rgmii-sleep-1 { + ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 { pins1 { pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts index c1cc80bcf5..88f25d89b2 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts @@ -89,8 +89,8 @@ ðernet0 { status = "okay"; - pinctrl-0 = <ðernet0_rgmii_pins_b>; - pinctrl-1 = <ðernet0_rgmii_pins_sleep_b>; + pinctrl-0 = <ðernet0_rgmii_pins_c>; + pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; pinctrl-names = "default", "sleep"; phy-mode = "rgmii"; max-speed = <1000>;
Alignment with pins name used in Linux kernel v5.8. It is a preleminary step for device tree alignment. Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com> --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 4 ++-- arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)