@@ -1029,6 +1029,19 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
};
+
+ some_regmapped-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ ranges = <0x0 0x0 0x10>;
+ compatible = "simple-bus";
+
+ regmap-test_0 {
+ reg = <0 0x10>;
+ compatible = "sandbox,regmap_test";
+ };
+ };
};
#include "sandbox_pmic.dtsi"
@@ -9,8 +9,10 @@
#include <mapmem.h>
#include <regmap.h>
#include <syscon.h>
+#include <rand.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <dm/devres.h>
#include <linux/err.h>
#include <test/ut.h>
@@ -186,3 +188,199 @@ static int dm_test_regmap_poll(struct unit_test_state *uts)
}
DM_TEST(dm_test_regmap_poll, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+struct regmaptest_priv {
+ struct regmap *cfg_regmap; /* For testing regmap_config options. */
+ struct regmap *fld_regmap; /* For testing regmap fields. */
+ struct regmap_field **fields;
+};
+
+static const struct reg_field field_cfgs[] = {
+ {
+ .reg = 0,
+ .lsb = 0,
+ .msb = 6,
+ },
+ {
+ .reg = 2,
+ .lsb = 4,
+ .msb = 12,
+ },
+ {
+ .reg = 2,
+ .lsb = 12,
+ .msb = 15,
+ }
+};
+
+#define REGMAP_TEST_BUF_START 0
+#define REGMAP_TEST_BUF_SZ 5
+
+static int remaptest_probe(struct udevice *dev)
+{
+ struct regmaptest_priv *priv = dev_get_priv(dev);
+ struct regmap *regmap;
+ struct regmap_field *field;
+ struct regmap_config cfg;
+ int i;
+ static const int n = ARRAY_SIZE(field_cfgs);
+
+ /*
+ * To exercise all the regmap config options, create a regmap that
+ * points to a custom memory area instead of the one defined in device
+ * tree. Use 2-byte elements. To allow directly indexing into the
+ * elements, use an offset shift of 1. So, accessing offset 1 gets the
+ * element at index 1 at memory location 2.
+ *
+ * REGMAP_TEST_BUF_SZ is the number of elements, so we need to multiply
+ * it by 2 because r_size expects number of bytes.
+ */
+ cfg.reg_offset_shift = 1;
+ cfg.r_start = REGMAP_TEST_BUF_START;
+ cfg.r_size = REGMAP_TEST_BUF_SZ * 2;
+ cfg.width = REGMAP_SIZE_16;
+
+ regmap = devm_regmap_init(dev, NULL, NULL, &cfg);
+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+ priv->cfg_regmap = regmap;
+
+ memset(&cfg, 0, sizeof(struct regmap_config));
+ cfg.width = REGMAP_SIZE_16;
+
+ regmap = devm_regmap_init(dev, NULL, NULL, &cfg);
+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+ priv->fld_regmap = regmap;
+
+ priv->fields = devm_kzalloc(dev, sizeof(struct regmap_field *) * n,
+ GFP_KERNEL);
+ if (!priv->fields)
+ return -ENOMEM;
+
+ for (i = 0 ; i < n; i++) {
+ field = devm_regmap_field_alloc(dev, priv->fld_regmap,
+ field_cfgs[i]);
+ if (IS_ERR(field))
+ return PTR_ERR(field);
+ priv->fields[i] = field;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id regmaptest_ids[] = {
+ { .compatible = "sandbox,regmap_test" },
+ { }
+};
+
+U_BOOT_DRIVER(regmap_test) = {
+ .name = "regmaptest_drv",
+ .of_match = regmaptest_ids,
+ .id = UCLASS_NOP,
+ .probe = remaptest_probe,
+ .priv_auto_alloc_size = sizeof(struct regmaptest_priv),
+};
+
+static int dm_test_devm_regmap(struct unit_test_state *uts)
+{
+ int i = 0;
+ u32 val;
+ u16 pattern[REGMAP_TEST_BUF_SZ];
+ u16 *buffer;
+ struct udevice *dev;
+ struct regmaptest_priv *priv;
+
+ sandbox_set_enable_memio(true);
+
+ /*
+ * Map the memory area the regmap should point to so we can make sure
+ * the writes actually go to that location.
+ */
+ buffer = map_physmem(REGMAP_TEST_BUF_START,
+ REGMAP_TEST_BUF_SZ * 2, MAP_NOCACHE);
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "regmap-test_0",
+ &dev));
+ priv = dev_get_priv(dev);
+
+ srand(get_ticks() + rand());
+ for (i = 0; i < REGMAP_TEST_BUF_SZ; i++) {
+ pattern[i] = rand();
+ ut_assertok(regmap_write(priv->cfg_regmap, i, pattern[i]));
+ }
+ for (i = 0; i < REGMAP_TEST_BUF_SZ; i++) {
+ ut_assertok(regmap_read(priv->cfg_regmap, i, &val));
+ ut_asserteq(val, buffer[i]);
+ ut_asserteq(val, pattern[i]);
+ }
+
+ ut_asserteq(-ERANGE, regmap_write(priv->cfg_regmap, REGMAP_TEST_BUF_SZ,
+ val));
+ ut_asserteq(-ERANGE, regmap_read(priv->cfg_regmap, REGMAP_TEST_BUF_SZ,
+ &val));
+ ut_asserteq(-ERANGE, regmap_write(priv->cfg_regmap, -1, val));
+ ut_asserteq(-ERANGE, regmap_read(priv->cfg_regmap, -1, &val));
+
+ return 0;
+}
+DM_TEST(dm_test_devm_regmap, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int test_one_field(struct unit_test_state *uts,
+ struct regmap *regmap,
+ struct regmap_field *field,
+ struct reg_field field_cfg)
+{
+ int j;
+ unsigned int val;
+ int mask = (1 << (field_cfg.msb - field_cfg.lsb + 1)) - 1;
+ int shift = field_cfg.lsb;
+
+ ut_assertok(regmap_write(regmap, field_cfg.reg, 0));
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(0, val);
+
+ for (j = 0; j <= mask; j++) {
+ ut_assertok(regmap_field_write(field, j));
+ ut_assertok(regmap_field_read(field, &val));
+ ut_asserteq(j, val);
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(j << shift, val);
+ }
+
+ ut_assertok(regmap_field_write(field, mask + 1));
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(0, val);
+
+ ut_assertok(regmap_field_write(field, 0xFFFF));
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(mask << shift, val);
+
+ ut_assertok(regmap_write(regmap, field_cfg.reg, 0xFFFF));
+ ut_assertok(regmap_field_write(field, 0));
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(0xFFFF & ~(mask << shift), val);
+ return 0;
+}
+
+static int dm_test_devm_regmap_field(struct unit_test_state *uts)
+{
+ int i, rc;
+ struct udevice *dev;
+ struct regmaptest_priv *priv;
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "regmap-test_0",
+ &dev));
+ priv = dev_get_priv(dev);
+
+ sandbox_set_enable_memio(true);
+ for (i = 0 ; i < ARRAY_SIZE(field_cfgs); i++) {
+ rc = test_one_field(uts, priv->fld_regmap, priv->fields[i],
+ field_cfgs[i]);
+ if (rc)
+ break;
+ }
+
+ return 0;
+}
+DM_TEST(dm_test_devm_regmap_field, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);