@@ -2,6 +2,8 @@
* NXP GPMI NAND flash driver (DT initialization)
*
* Copyright (C) 2018 Toradex
+ * Copyright 2019 NXP
+ *
* Authors:
* Stefan Agner <stefan.agner at toradex.com>
*
@@ -14,6 +16,7 @@
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/printk.h>
+#include <clk.h>
#include <mxs_nand.h>
@@ -91,6 +94,72 @@ static int mxs_nand_dt_probe(struct udevice *dev)
info->legacy_bch_geometry = dev_read_bool(dev, "fsl,legacy-bch-geometry");
+ if (IS_ENABLED(CONFIG_CLK) && IS_ENABLED(CONFIG_IMX8)) {
+ /* Assigned clock already set clock */
+ struct clk gpmi_clk;
+
+ ret = clk_get_by_name(dev, "gpmi_io", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi io clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi io clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_get_by_name(dev, "gpmi_apb", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi_apb clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi_apb clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_get_by_name(dev, "gpmi_bch", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi_bch clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi_bch clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_get_by_name(dev, "gpmi_apb_bch", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi_apb_bch clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi_apb_bch clk: %d\n", ret);
+ return ret;
+ }
+
+ /* this clock is used for apbh_dma, since the apbh dma does not support DM,
+ * we optionally enable it here
+ */
+ ret = clk_get_by_name(dev, "gpmi_apbh_dma", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi_apbh_dma clk: %d\n", ret);
+ } else {
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi_apbh_dma clk: %d\n", ret);
+ }
+ }
+ }
+
return mxs_nand_init_ctrl(info);
}