Message ID | 1584190436-8772-2-git-send-email-kuldeep.singh@nxp.com |
---|---|
State | Accepted |
Commit | cae3c7cc581c441d822e18c0d14dd3c230beef80 |
Headers | show |
Series | Enable octal read support for mt35xu* flashes | expand |
>-----Original Message----- >From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Kuldeep Singh >Sent: Saturday, March 14, 2020 6:24 PM >To: Priyanka Jain <priyanka.jain at nxp.com>; Jagan Teki ><jagan at amarulasolutions.com>; Vignesh R <vigneshr at ti.com>; u- >boot at lists.denx.de >Cc: Kuldeep Singh <kuldeep.singh at nxp.com> >Subject: [Patch v3 1/3] mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for >mt35xu* > >Commit 658df8bd9464 ("mtd: spi-nor-core: Add octal mode support") enables >octal mode(1-1-8) support in spi-nor framework. > >mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O. Hence, >enable SPI_NOR_OCTAL_READ flag for these flashes. > >Signed-off-by: Kuldeep Singh <kuldeep.singh at nxp.com> >Reviewed-by: Vignesh Raghavendra <vigneshr at ti.com> >--- >v3: No change >v2: Reword commit message > > drivers/mtd/spi/spi-nor-ids.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > >diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index >973b6f8..334c074 100644 >--- a/drivers/mtd/spi/spi-nor-ids.c >+++ b/drivers/mtd/spi/spi-nor-ids.c >@@ -182,8 +182,8 @@ const struct flash_info spi_nor_ids[] = { > { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR >| SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR >| SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | >USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, >- { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | >SPI_NOR_4B_OPCODES) }, >- { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | >SPI_NOR_4B_OPCODES) }, >+ { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | >SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, >+ { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | >+SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, > #endif > #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ > /* Spansion/Cypress -- single (large) sector size only, at least >-- >2.7.4 Reviewed-by: Priyanka Jain <priyanka.jain at nxp.com> Jagan, Please help to pick this patch or provide ack. Thanks Priyanka
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 973b6f8..334c074 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -182,8 +182,8 @@ const struct flash_info spi_nor_ids[] = { { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, - { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_4B_OPCODES) }, - { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_4B_OPCODES) }, + { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ /* Spansion/Cypress -- single (large) sector size only, at least