| Message ID | 20200610104120.30668-13-rayagonda.kokatanur@broadcom.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | add initial support for broadcom NS3 soc | expand |
On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com> wrote: > > From: Bharat Kumar Reddy Gooty <bharat.gooty at broadcom.com> > > By default re-location happens to higher address of DDR, relocation happens to a higher address > i.e, DDR start + DDR size. > > Limit re-location to happen within 16MB memory, > start 0xFF00_0000 and end 0x1_0000_0000 Please add the motivation for this patch. Why? > > Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty at broadcom.com> > Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com> > --- > board/broadcom/bcmns3/ns3.c | 22 +++++++++++++++++++--- > 1 file changed, 19 insertions(+), 3 deletions(-) > Reviewed-by: Simon Glass <sjg at chromium.org>
On Fri, Jun 26, 2020 at 6:42 AM Simon Glass <sjg at chromium.org> wrote: > > On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur > <rayagonda.kokatanur at broadcom.com> wrote: > > > > From: Bharat Kumar Reddy Gooty <bharat.gooty at broadcom.com> > > > > By default re-location happens to higher address of DDR, > > relocation happens to a higher address Thank you, will fix it. > > > i.e, DDR start + DDR size. > > > > Limit re-location to happen within 16MB memory, > > start 0xFF00_0000 and end 0x1_0000_0000 > > Please add the motivation for this patch. Why? We use u-boot to collect the ramdump. We are restricting the u-boot to use only 16MB. So that we can reserve only 16MB DDR Thanks, Rayagonda > > > > > Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty at broadcom.com> > > Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com> > > --- > > board/broadcom/bcmns3/ns3.c | 22 +++++++++++++++++++--- > > 1 file changed, 19 insertions(+), 3 deletions(-) > > > > Reviewed-by: Simon Glass <sjg at chromium.org>
Hi Rayagonda, On Fri, 26 Jun 2020 at 04:21, Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com> wrote: > > On Fri, Jun 26, 2020 at 6:42 AM Simon Glass <sjg at chromium.org> wrote: > > > > On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur > > <rayagonda.kokatanur at broadcom.com> wrote: > > > > > > From: Bharat Kumar Reddy Gooty <bharat.gooty at broadcom.com> > > > > > > By default re-location happens to higher address of DDR, > > > > relocation happens to a higher address > > Thank you, will fix it. > > > > > i.e, DDR start + DDR size. > > > > > > Limit re-location to happen within 16MB memory, > > > start 0xFF00_0000 and end 0x1_0000_0000 > > > > Please add the motivation for this patch. Why? > > We use u-boot to collect the ramdump. We are restricting the u-boot to > use only 16MB. So that we can reserve only 16MB DDR U-Boot So you are wanting to leave most of the memory alone so you can check it for this? OK that's the info needed in your commit message. Regards, Simon
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 85d097887e..0dd78cde34 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -120,6 +120,11 @@ static void mem_info_parse_fixup(void *fdt) int board_init(void) { + /* Setup memory using "memory" node from DTB */ + if (fdtdec_setup_mem_size_base() != 0) + return -EINVAL; + fdtdec_setup_memory_banksize(); + if (bl33_info->version != BL33_INFO_VERSION) printf("*** warning: ATF BL31 and u-boot not in sync! ***\n"); @@ -133,19 +138,30 @@ int board_late_init(void) int dram_init(void) { - if (fdtdec_setup_mem_size_base() != 0) - return -EINVAL; + /* + * Mark ram base as the last 16MB of 2GB DDR, which is 0xFF00_0000. + * So that relocation happens with in the last 16MB memory. + */ + gd->ram_base = (phys_size_t)(BCM_NS3_MEM_END - SZ_16M); + gd->ram_size = (unsigned long)SZ_16M; return 0; } int dram_init_banksize(void) { - fdtdec_setup_memory_banksize(); + gd->bd->bi_dram[0].start = (BCM_NS3_MEM_END - SZ_16M); + gd->bd->bi_dram[0].size = SZ_16M; return 0; } +/* Limit RAM used by U-Boot to the DDR first bank End region */ +ulong board_get_usable_ram_top(ulong total_size) +{ + return BCM_NS3_MEM_END; +} + void reset_cpu(ulong level) { #define L3_RESET 30