diff mbox series

[v6,2/4] uclass: cpu: fix to display proper CPU features

Message ID 1593175161-26278-3-git-send-email-sagar.kadam@sifive.com
State New
Headers show
Series update clock handler and proper cpu features | expand

Commit Message

Sagar Shrikant Kadam June 26, 2020, 12:39 p.m. UTC
The cmd "cpu detail" fetches uninitialized cpu feature information
and thus displays wrong / inconsitent details as below.
For eg: FU540-C000 doesn't have any microcode, yet the cmd display's it.

=> cpu detail
  1: cpu at 1      rv64imafdc
        ID = 1, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  2: cpu at 2      rv64imafdc
        ID = 2, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  3: cpu at 3      rv64imafdc
        ID = 3, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  4: cpu at 4      rv64imafdc
        ID = 4, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0

The L1 cache or MMU entry seen above is also displayed inconsistently.
So initialize cpu information to zero into cpu-uclass itself so that
similar issues can be avoided for other CPU drivers.

We now see correct features as:
=> cpu detail
  1: cpu at 1      rv64imafdc
        ID = 1, freq = 999.100 MHz
  2: cpu at 2      rv64imafdc
        ID = 2, freq = 999.100 MHz
  3: cpu at 3      rv64imafdc
        ID = 3, freq = 999.100 MHz
  4: cpu at 4      rv64imafdc
        ID = 4, freq = 999.100 MHz

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>
---
 drivers/cpu/cpu-uclass.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Bin Meng June 26, 2020, 1:19 p.m. UTC | #1
Hi Sagar,

On Fri, Jun 26, 2020 at 8:40 PM Sagar Shrikant Kadam
<sagar.kadam at sifive.com> wrote:
>
> The cmd "cpu detail" fetches uninitialized cpu feature information
> and thus displays wrong / inconsitent details as below.
> For eg: FU540-C000 doesn't have any microcode, yet the cmd display's it.
>
> => cpu detail
>   1: cpu at 1      rv64imafdc
>         ID = 1, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
>         Microcode version 0x0
>         Device ID 0x0
>   2: cpu at 2      rv64imafdc
>         ID = 2, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
>         Microcode version 0x0
>         Device ID 0x0
>   3: cpu at 3      rv64imafdc
>         ID = 3, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
>         Microcode version 0x0
>         Device ID 0x0
>   4: cpu at 4      rv64imafdc
>         ID = 4, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
>         Microcode version 0x0
>         Device ID 0x0
>
> The L1 cache or MMU entry seen above is also displayed inconsistently.
> So initialize cpu information to zero into cpu-uclass itself so that
> similar issues can be avoided for other CPU drivers.
>
> We now see correct features as:
> => cpu detail
>   1: cpu at 1      rv64imafdc
>         ID = 1, freq = 999.100 MHz
>   2: cpu at 2      rv64imafdc
>         ID = 2, freq = 999.100 MHz
>   3: cpu at 3      rv64imafdc
>         ID = 3, freq = 999.100 MHz
>   4: cpu at 4      rv64imafdc
>         ID = 4, freq = 999.100 MHz
>
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
> Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>
> ---
>  drivers/cpu/cpu-uclass.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c
> index 7418c26..9f4a8fd 100644
> --- a/drivers/cpu/cpu-uclass.c
> +++ b/drivers/cpu/cpu-uclass.c
> @@ -83,6 +83,9 @@ int cpu_get_info(struct udevice *dev, struct cpu_info *info)
>  {
>         struct cpu_ops *ops = cpu_get_ops(dev);
>
> +       /* Init cpu_info to 0 */
> +       memset(info, 0, sizeof(struct cpu_info));
> +

nits: this should be put after the if() test logic below

>         if (!ops->get_info)
>                 return -ENOSYS;
>
> --

Other than that,
Reviewed-by: Bin Meng <bin.meng at windriver.com>

Regards,
Bin
Sagar Shrikant Kadam June 27, 2020, 11:10 a.m. UTC | #2
Hi Bin,

> -----Original Message-----
> From: Bin Meng <bmeng.cn at gmail.com>
> Sent: Friday, June 26, 2020 6:50 PM
> To: Sagar Kadam <sagar.kadam at sifive.com>
> Cc: U-Boot Mailing List <u-boot at lists.denx.de>; Rick Chen
> <rick at andestech.com>; Bin Meng <bin.meng at windriver.com>; Jagan Teki
> <jagan at amarulasolutions.com>; Pragnesh Patel
> <pragnesh.patel at sifive.com>; Anup Patel <anup.patel at wdc.com>; Simon
> Glass <sjg at chromium.org>; Ye Li <ye.li at nxp.com>; Peng Fan
> <peng.fan at nxp.com>; Sean Anderson <seanga2 at gmail.com>
> Subject: Re: [PATCH v6 2/4] uclass: cpu: fix to display proper CPU features
> 
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
> 
> Hi Sagar,
> 
> On Fri, Jun 26, 2020 at 8:40 PM Sagar Shrikant Kadam
> <sagar.kadam at sifive.com> wrote:
> >
> > The cmd "cpu detail" fetches uninitialized cpu feature information and
> > thus displays wrong / inconsitent details as below.
> > For eg: FU540-C000 doesn't have any microcode, yet the cmd display's it.
> >
> > => cpu detail
> >   1: cpu at 1      rv64imafdc
> >         ID = 1, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
> >         Microcode version 0x0
> >         Device ID 0x0
> >   2: cpu at 2      rv64imafdc
> >         ID = 2, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
> >         Microcode version 0x0
> >         Device ID 0x0
> >   3: cpu at 3      rv64imafdc
> >         ID = 3, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
> >         Microcode version 0x0
> >         Device ID 0x0
> >   4: cpu at 4      rv64imafdc
> >         ID = 4, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
> >         Microcode version 0x0
> >         Device ID 0x0
> >
> > The L1 cache or MMU entry seen above is also displayed inconsistently.
> > So initialize cpu information to zero into cpu-uclass itself so that
> > similar issues can be avoided for other CPU drivers.
> >
> > We now see correct features as:
> > => cpu detail
> >   1: cpu at 1      rv64imafdc
> >         ID = 1, freq = 999.100 MHz
> >   2: cpu at 2      rv64imafdc
> >         ID = 2, freq = 999.100 MHz
> >   3: cpu at 3      rv64imafdc
> >         ID = 3, freq = 999.100 MHz
> >   4: cpu at 4      rv64imafdc
> >         ID = 4, freq = 999.100 MHz
> >
> > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
> > Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>
> > ---
> >  drivers/cpu/cpu-uclass.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c index
> > 7418c26..9f4a8fd 100644
> > --- a/drivers/cpu/cpu-uclass.c
> > +++ b/drivers/cpu/cpu-uclass.c
> > @@ -83,6 +83,9 @@ int cpu_get_info(struct udevice *dev, struct
> > cpu_info *info)  {
> >         struct cpu_ops *ops = cpu_get_ops(dev);
> >
> > +       /* Init cpu_info to 0 */
> > +       memset(info, 0, sizeof(struct cpu_info));
> > +
> 
> nits: this should be put after the if() test logic below
> 
Ok. I will submit it

> >         if (!ops->get_info)
> >                 return -ENOSYS;
> >
> > --
> 
> Other than that,
> Reviewed-by: Bin Meng <bin.meng at windriver.com>
> 

Thanks here.

BR,
Sagar

> Regards,
> Bin
diff mbox series

Patch

diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c
index 7418c26..9f4a8fd 100644
--- a/drivers/cpu/cpu-uclass.c
+++ b/drivers/cpu/cpu-uclass.c
@@ -83,6 +83,9 @@  int cpu_get_info(struct udevice *dev, struct cpu_info *info)
 {
 	struct cpu_ops *ops = cpu_get_ops(dev);
 
+	/* Init cpu_info to 0 */
+	memset(info, 0, sizeof(struct cpu_info));
+
 	if (!ops->get_info)
 		return -ENOSYS;