diff mbox series

[v2] armv8: ls1028a_serdes: add a few missing serdes protocols to supported list

Message ID 20200110215132.2592-1-alexandru.marginean@nxp.com
State Accepted
Commit 430a5542f33153b30a283c1d28d92f5826b176a1
Headers show
Series [v2] armv8: ls1028a_serdes: add a few missing serdes protocols to supported list | expand

Commit Message

Alex Marginean Jan. 10, 2020, 9:51 p.m. UTC
These protocols are supported and functional but they trigger a warning
in U-Boot console at boot because they are not on this list.

Signed-off-by: Alex Marginean <alexandru.marginean at nxp.com>
---

Changes in v2:
 - added one more, 65bb
 - changed subject

This patch replaces v1:
 https://patchwork.ozlabs.org/patch/1220248/

 arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Priyanka Jain Jan. 27, 2020, 6:15 a.m. UTC | #1
>-----Original Message-----
>From: Alex Marginean <alexandru.marginean at nxp.com>
>Sent: Saturday, January 11, 2020 3:22 AM
>To: u-boot at lists.denx.de
>Cc: Priyanka Jain <priyanka.jain at nxp.com>; Alexandru Marginean
><alexandru.marginean at nxp.com>
>Subject: [PATCH v2] armv8: ls1028a_serdes: add a few missing serdes
>protocols to supported list
>
>These protocols are supported and functional but they trigger a warning in U-
>Boot console at boot because they are not on this list.
>
>Signed-off-by: Alex Marginean <alexandru.marginean at nxp.com>
>---
patch applied (after updating description with serdes protocol number) in u-boot-fsl-qoriq/master
-priyankajain
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
index 313f3f1e8a..80d2910f67 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
@@ -35,6 +35,10 @@  static struct serdes_config serdes1_cfg_tbl[] = {
 	{0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} },
 	{0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} },
 	{0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} },
+	{0x7777, {SGMII1, SGMII2, SGMII3, SGMII4} },
+	{0x9999, {SGMII1, SGMII2, SGMII3, SGMII4} },
+	{0xb998, {SGMII_T1, SGMII2, SGMII3, PCIE1} },
+	{0xbb56, {SGMII_T1, QSGMII_B, PCIE2, PCIE1} },
 	{}
 };