diff mbox series

[v4,1/4] pci: layerscape: Common device tree fixup for NXP SoCs

Message ID 1578312338-15545-2-git-send-email-wasim.khan@nxp.com
State Accepted
Commit 1185b229cca55a5ce3ee7bb35b203f788254f1a1
Headers show
Series Enablement of PCIe controller for lx2160a rev2 | expand

Commit Message

Wasim Khan Jan. 6, 2020, 12:05 p.m. UTC 
Add Common device tree fixup for NXP SoCs. Based on
SoC and revision call pcie_layerscape or pcie_layerscape_gen4
fixup.

Signed-off-by: Wasim Khan <wasim.khan at nxp.com>
---
Changes in v4:
 1-fix compilation warning with pcie_layerscape_fixup_common.c file
 2-Updated NXP copyright

Changes in v3:
 fix compilation errors with lx2160aqds_tfa_SECURE_BOOT_defconfig
 and lx2160ardb_tfa_SECURE_BOOT_defconfig

Changes in v2
 Ported changes to latest codebase

 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig |  1 +
 configs/lx2160aqds_tfa_defconfig             |  1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig |  1 +
 configs/lx2160ardb_tfa_defconfig             |  1 +
 drivers/pci/Makefile                         |  5 +++--
 drivers/pci/pcie_layerscape_fixup.c          |  7 ++++---
 drivers/pci/pcie_layerscape_fixup_common.c   | 27 +++++++++++++++++++++++++++
 drivers/pci/pcie_layerscape_fixup_common.h   | 20 ++++++++++++++++++++
 drivers/pci/pcie_layerscape_gen4_fixup.c     |  7 ++++---
 9 files changed, 62 insertions(+), 8 deletions(-)
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h

Comments

Priyanka Jain Jan. 27, 2020, 5:58 a.m. UTC | #1 
>-----Original Message-----
>From: Wasim Khan <wasim.khan at nxp.com>
>Sent: Monday, January 6, 2020 5:36 PM
>To: Priyanka Jain <priyanka.jain at nxp.com>
>Cc: u-boot at lists.denx.de; Wasim Khan <wasim.khan at nxp.com>
>Subject: [PATCH v4 1/4] pci: layerscape: Common device tree fixup for NXP
>SoCs
>
>Add Common device tree fixup for NXP SoCs. Based on SoC and revision call
>pcie_layerscape or pcie_layerscape_gen4 fixup.
>
>Signed-off-by: Wasim Khan <wasim.khan at nxp.com>
>---
Series applied in u-boot-fsl-qoriq
-priyankajain
diff mbox series

Patch

diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 4858f66..dbac1dc 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -55,6 +55,7 @@  CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 167c517..d7ea3bf 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -57,6 +57,7 @@  CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 87459dd..c3e9231 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -51,6 +51,7 @@  CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index f6cf1ac..97f535d 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -56,6 +56,7 @@  CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 8a33eb0..c051ecc 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -34,9 +34,10 @@  obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
 obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o
 obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
-obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
+obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o pcie_layerscape_fixup_common.o
 obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \
-				pcie_layerscape_gen4_fixup.o pcie_layerscape.o
+				pcie_layerscape_gen4_fixup.o \
+				pcie_layerscape_fixup_common.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
 obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o
 obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 27ef20d..e77404c 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -1,6 +1,6 @@ 
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017-2019 NXP
+ * Copyright 2017-2020 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -17,6 +17,7 @@ 
 #include <asm/arch/clock.h>
 #endif
 #include "pcie_layerscape.h"
+#include "pcie_layerscape_fixup_common.h"
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
 /*
@@ -271,7 +272,7 @@  static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
 }
 
 /* Fixup Kernel DT for PCIe */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, bd_t *bd)
 {
 	struct ls_pcie *pcie;
 
@@ -284,7 +285,7 @@  void ft_pci_setup(void *blob, bd_t *bd)
 }
 
 #else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, bd_t *bd)
 {
 }
 #endif
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c
new file mode 100644
index 0000000..b32236e
--- /dev/null
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -0,0 +1,27 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2020 NXP
+ *
+ * PCIe DT fixup for NXP Layerscape SoCs
+ * Author: Wasim Khan <wasim.khan at nxp.com>
+ *
+ */
+
+#include <common.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/soc.h>
+#include "pcie_layerscape_fixup_common.h"
+
+void ft_pci_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
+	uint svr;
+
+	svr = SVR_SOC_VER(get_svr());
+
+	if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0))
+		ft_pci_setup_ls_gen4(blob, bd);
+	else
+#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
+		ft_pci_setup_ls(blob, bd);
+}
diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h
new file mode 100644
index 0000000..be729b6
--- /dev/null
+++ b/drivers/pci/pcie_layerscape_fixup_common.h
@@ -0,0 +1,20 @@ 
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019-2020 NXP
+ *
+ * PCIe DT fixup for NXP Layerscape SoCs
+ * Author: Wasim Khan <wasim.khan at nxp.com>
+ *
+ */
+#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
+#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
+
+#include <common.h>
+
+void ft_pci_setup_ls(void *blob, bd_t *bd);
+
+#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4
+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd);
+#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
+
+#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index da98171..b99ab0f 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -1,6 +1,6 @@ 
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2020 NXP
  *
  * PCIe Gen4 driver for NXP Layerscape SoCs
  * Author: Hou Zhiqiang <Minder.Hou at gmail.com>
@@ -19,6 +19,7 @@ 
 #include <asm/arch/clock.h>
 #endif
 #include "pcie_layerscape_gen4.h"
+#include "pcie_layerscape_fixup_common.h"
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
 /*
@@ -234,7 +235,7 @@  static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie)
 }
 
 /* Fixup Kernel DT for PCIe */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 {
 	struct ls_pcie_g4 *pcie;
 
@@ -247,7 +248,7 @@  void ft_pci_setup(void *blob, bd_t *bd)
 }
 
 #else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 {
 }
 #endif