Message ID | de6518b8429811c0b12dd9a5506cb0f31fd6268e.1587039752.git.michal.simek@xilinx.com |
---|---|
State | Accepted |
Commit | e86dce1c0c240b8f548d757c80bd65f38d37512e |
Headers | show |
Series | ARM: zynq: Add nand controller node in zynq-ces-nand dt | expand |
?t 16. 4. 2020 v 14:22 odes?latel Michal Simek <michal.simek at xilinx.com> napsal: > > From: T Karthik Reddy <t.karthik.reddy at xilinx.com> > > Add memory-controller at e000e000 node in zynq-ces-nand.dts as > zynq_nand driver utilizes flash at e1000000 node. Without this > dt node mini nand u-boot does not probe. > > Signed-off-by: T Karthik Reddy <t.karthik.reddy at xilinx.com> > Signed-off-by: Michal Simek <michal.simek at xilinx.com> > --- > > arch/arm/dts/zynq-cse-nand.dts | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts > index 1e16d7fab97d..32cb3bffcb94 100644 > --- a/arch/arm/dts/zynq-cse-nand.dts > +++ b/arch/arm/dts/zynq-cse-nand.dts > @@ -38,6 +38,21 @@ > #size-cells = <1>; > ranges; > > + smcc: memory-controller at e000e000 { > + #address-cells = <1>; > + #size-cells = <1>; > + clock-names = "memclk", "apb_pclk"; > + clocks = <&clkc 11>, <&clkc 44>; > + compatible = "arm,pl353-smc-r2p1", "arm,primecell"; > + ranges; > + reg = <0xe000e000 0x1000>; > + > + nand0: flash at e1000000 { > + compatible = "arm,pl353-nand-r2p1"; > + reg = <0xe1000000 0x1000000>; > + }; > + }; > + > slcr: slcr at f8000000 { > u-boot,dm-pre-reloc; > #address-cells = <1>; > -- > 2.26.0 > Applied. M
diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts index 1e16d7fab97d..32cb3bffcb94 100644 --- a/arch/arm/dts/zynq-cse-nand.dts +++ b/arch/arm/dts/zynq-cse-nand.dts @@ -38,6 +38,21 @@ #size-cells = <1>; ranges; + smcc: memory-controller at e000e000 { + #address-cells = <1>; + #size-cells = <1>; + clock-names = "memclk", "apb_pclk"; + clocks = <&clkc 11>, <&clkc 44>; + compatible = "arm,pl353-smc-r2p1", "arm,primecell"; + ranges; + reg = <0xe000e000 0x1000>; + + nand0: flash at e1000000 { + compatible = "arm,pl353-nand-r2p1"; + reg = <0xe1000000 0x1000000>; + }; + }; + slcr: slcr at f8000000 { u-boot,dm-pre-reloc; #address-cells = <1>;