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[v2,0/3] arm: caches: allow to activate dcache in SPL and in U-Boot pre-reloc

Message ID 20200424182017.11852-1-patrick.delaunay@st.com
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Series arm: caches: allow to activate dcache in SPL and in U-Boot pre-reloc | expand

Message

Patrick Delaunay April 24, 2020, 6:20 p.m. UTC
Hi

It is a V2 serie after Marek feedback for
http://patchwork.ozlabs.org/project/uboot/list/?series=168378

This serie allows dcache activation in SPL or in U-Boot preloc stage
for ARM board.

See "arm: stm32mp1: activate data cache in SPL and before relocation"
for example of usage in SPL and in U-Boot pre-reloc of the function
dcache_enable() and of mmu_set_region_dcache_behaviour().

A branch named "dcache" with the needed patches for stm32mp1 boards
is available in:
https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git


Changes in v2:
- update patch after Marek's proposal. but I just divided by 2 instead
  of 4kB (minimal MMU page size)

Patrick Delaunay (3):
  arm: caches: protect dram_bank_mmu_setup access to bi_dram
  arm: caches: add DCACHE_DEFAULT_OPTION
  arm: caches: manage phys_addr_t overflow in
    mmu_set_region_dcache_behaviour

 arch/arm/include/asm/system.h |  8 ++++++++
 arch/arm/lib/cache-cp15.c     | 20 ++++++++++----------
 2 files changed, 18 insertions(+), 10 deletions(-)

Comments

Tom Rini April 28, 2020, 7:49 p.m. UTC | #1
On Fri, Apr 24, 2020 at 08:20:14PM +0200, Patrick Delaunay wrote:

> 
> Hi
> 
> It is a V2 serie after Marek feedback for
> http://patchwork.ozlabs.org/project/uboot/list/?series=168378
> 
> This serie allows dcache activation in SPL or in U-Boot preloc stage
> for ARM board.
> 
> See "arm: stm32mp1: activate data cache in SPL and before relocation"
> for example of usage in SPL and in U-Boot pre-reloc of the function
> dcache_enable() and of mmu_set_region_dcache_behaviour().
> 
> A branch named "dcache" with the needed patches for stm32mp1 boards
> is available in:
> https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git
> 
> 
> Changes in v2:
> - update patch after Marek's proposal. but I just divided by 2 instead
>   of 4kB (minimal MMU page size)
> 
> Patrick Delaunay (3):
>   arm: caches: protect dram_bank_mmu_setup access to bi_dram
>   arm: caches: add DCACHE_DEFAULT_OPTION
>   arm: caches: manage phys_addr_t overflow in
>     mmu_set_region_dcache_behaviour
> 
>  arch/arm/include/asm/system.h |  8 ++++++++
>  arch/arm/lib/cache-cp15.c     | 20 ++++++++++----------
>  2 files changed, 18 insertions(+), 10 deletions(-)

All in all, I like it, good work.  I'll pick it up not right now but
before -rc2.  Thanks!