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[RESEND,v3,0/7] x86: Improve support for chain-loading U-Boot

Message ID 20200408185755.116336-1-sjg@chromium.org
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Series x86: Improve support for chain-loading U-Boot | expand

Message

Simon Glass April 8, 2020, 6:57 p.m. UTC
This little series adds a few checks into the code to allow better
operation when booting a build from a previous-state loader such as
coreboot.

At present we have a 'coreboot' target but this runs very different code
from the bare-metal targets, such as coral. There is very little in common
between them.

It is useful to be able to boot the same U-Boot on a device, with or
without a first-stage bootloader. For example, with chromebook_coral, it
is helpful for testing to be able to boot the same U-Boot (complete with
FSP) on bare metal and from coreboot. It allows checking of things like
CPU speed, comparing registers, ACPI tables and the like.

This series allows U-Boot to detect that it ran from coreboot and
automatically do the right thing.

This series makes the most important changes to allow the same u-boot.bin
for coral to boot after coreboot (by itself) or bare metal (via TPL->SPL).

Changes in v3:
- Add a new patch with a gd flag for chain loading
- Add new patch to detect running from coreboot

Changes in v2:
- Drop the other check in interrupt_init() which is not needed now
- Drop patch 'dm: Avoid initing built-in devices when chain loading'

Simon Glass (7):
  x86: fsp: Allow skipping init code when chain loading
  x86: apl: Skip init code when chain loading
  x86: cpu: Skip init code when chain loading
  pci: Avoid auto-config when chain loading
  board: Add a gd flag for chain loading
  x86: Add a way to detect running from coreboot
  x86: Use the existing stack when chain-loading

 arch/x86/cpu/apollolake/fsp_s.c   |  2 ++
 arch/x86/cpu/cpu.c                |  4 +++-
 arch/x86/cpu/i386/cpu.c           | 15 +++++++++++++++
 arch/x86/cpu/i386/interrupt.c     |  6 ++++--
 arch/x86/cpu/start_from_spl.S     | 16 ++++++++++++++--
 arch/x86/include/asm/u-boot-x86.h |  7 +++++++
 arch/x86/lib/fsp/fsp_dram.c       |  8 ++++++++
 arch/x86/lib/fsp/fsp_graphics.c   |  3 +++
 arch/x86/lib/fsp2/fsp_dram.c      | 10 ++++++++++
 arch/x86/lib/fsp2/fsp_init.c      |  2 +-
 arch/x86/lib/init_helpers.c       |  3 +++
 drivers/pci/pci-uclass.c          |  4 ++--
 include/asm-generic/global_data.h |  1 +
 include/init.h                    |  2 +-
 14 files changed, 74 insertions(+), 9 deletions(-)

Comments

Bin Meng April 23, 2020, 11:06 a.m. UTC | #1
Hi Simon,

On Thu, Apr 9, 2020 at 2:58 AM Simon Glass <sjg at chromium.org> wrote:
>
> This little series adds a few checks into the code to allow better
> operation when booting a build from a previous-state loader such as
> coreboot.
>
> At present we have a 'coreboot' target but this runs very different code
> from the bare-metal targets, such as coral. There is very little in common
> between them.
>
> It is useful to be able to boot the same U-Boot on a device, with or
> without a first-stage bootloader. For example, with chromebook_coral, it
> is helpful for testing to be able to boot the same U-Boot (complete with
> FSP) on bare metal and from coreboot. It allows checking of things like
> CPU speed, comparing registers, ACPI tables and the like.
>
> This series allows U-Boot to detect that it ran from coreboot and
> automatically do the right thing.
>
> This series makes the most important changes to allow the same u-boot.bin
> for coral to boot after coreboot (by itself) or bare metal (via TPL->SPL).
>
> Changes in v3:
> - Add a new patch with a gd flag for chain loading
> - Add new patch to detect running from coreboot

Sorry it took me some time to have a look at this series. I have some
comments against 5 & 6.

Could you please update doc/arch/x86.rst for the purpose and usage of
the chain loading?

Regards,
Bin