| Message ID | 20200227152156.87385-1-andriy.shevchenko@linux.intel.com |
|---|---|
| State | Accepted |
| Commit | bf4661bcb0e70da975b7513006b204f01fdbc0f7 |
| Headers | show |
| Series | [v1,1/3] dm: serial: Add clock member to struct serial_device_info | expand |
On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko <andriy.shevchenko at linux.intel.com> wrote: > > Some callers of serial_getinfo() would like to know the UART base > clock speed in order to make decision what to pass to OS in some > cases. In particular, ACPI SPCR table expects only certain base > clock speed and thus we have to act accordingly. > > Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> > --- > drivers/serial/sandbox.c | 1 + > include/serial.h | 3 +++ > test/dm/serial.c | 1 + > 3 files changed, 5 insertions(+) Reviewed-by: Simon Glass <sjg at chromium.org>
On Fri, Feb 28, 2020 at 7:41 AM Simon Glass <sjg at chromium.org> wrote: > > On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko > <andriy.shevchenko at linux.intel.com> wrote: > > > > Some callers of serial_getinfo() would like to know the UART base > > clock speed in order to make decision what to pass to OS in some > > cases. In particular, ACPI SPCR table expects only certain base > > clock speed and thus we have to act accordingly. > > > > Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> > > --- > > drivers/serial/sandbox.c | 1 + > > include/serial.h | 3 +++ > > test/dm/serial.c | 1 + > > 3 files changed, 5 insertions(+) > > Reviewed-by: Simon Glass <sjg at chromium.org> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
On Wed, Apr 15, 2020 at 10:19 PM Bin Meng <bmeng.cn at gmail.com> wrote: > > On Fri, Feb 28, 2020 at 7:41 AM Simon Glass <sjg at chromium.org> wrote: > > > > On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko > > <andriy.shevchenko at linux.intel.com> wrote: > > > > > > Some callers of serial_getinfo() would like to know the UART base > > > clock speed in order to make decision what to pass to OS in some > > > cases. In particular, ACPI SPCR table expects only certain base > > > clock speed and thus we have to act accordingly. > > > > > > Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> > > > --- > > > drivers/serial/sandbox.c | 1 + > > > include/serial.h | 3 +++ > > > test/dm/serial.c | 1 + > > > 3 files changed, 5 insertions(+) > > > > Reviewed-by: Simon Glass <sjg at chromium.org> > > Reviewed-by: Bin Meng <bmeng.cn at gmail.com> applied to u-boot-x86, thanks!
diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index 1af5cc12f3..545ff3f747 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -198,6 +198,7 @@ static int sandbox_serial_getinfo(struct udevice *dev, .reg_width = 1, .reg_offset = 0, .reg_shift = 0, + .clock = SERIAL_DEFAULT_CLOCK, }; if (!serial_info) diff --git a/include/serial.h b/include/serial.h index 104f34ff91..54b21a0470 100644 --- a/include/serial.h +++ b/include/serial.h @@ -139,6 +139,7 @@ enum adr_space_type { * @reg_width: size (in bytes) of the IO accesses to the registers * @reg_offset: offset to apply to the @addr from the start of the registers * @reg_shift: quantity to shift the register offsets by + * @clock: UART base clock speed in Hz * @baudrate: baud rate */ struct serial_device_info { @@ -148,10 +149,12 @@ struct serial_device_info { u8 reg_width; u8 reg_offset; u8 reg_shift; + unsigned int clock; unsigned int baudrate; }; #define SERIAL_DEFAULT_ADDRESS 0xBADACCE5 +#define SERIAL_DEFAULT_CLOCK (16 * 115200) /** * struct struct dm_serial_ops - Driver model serial operations diff --git a/test/dm/serial.c b/test/dm/serial.c index 3d741a8c36..c6be6ab7ab 100644 --- a/test/dm/serial.c +++ b/test/dm/serial.c @@ -29,6 +29,7 @@ static int dm_test_serial(struct unit_test_state *uts) ut_assertok(serial_getinfo(dev_serial, &info_serial)); ut_assert(info_serial.type == SERIAL_CHIP_UNKNOWN); ut_assert(info_serial.addr == SERIAL_DEFAULT_ADDRESS); + ut_assert(info_serial.clock == SERIAL_DEFAULT_CLOCK); /* * test with a parameter which is NULL pointer */
Some callers of serial_getinfo() would like to know the UART base clock speed in order to make decision what to pass to OS in some cases. In particular, ACPI SPCR table expects only certain base clock speed and thus we have to act accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> --- drivers/serial/sandbox.c | 1 + include/serial.h | 3 +++ test/dm/serial.c | 1 + 3 files changed, 5 insertions(+)