| Message ID | 1586832922-29191-1-git-send-email-sivaprak@codeaurora.org |
|---|---|
| Headers | show |
| Series | Add APSS clock controller support for IPQ6018 | expand |
On Tue, Apr 14, 2020 at 08:25:16AM +0530, Sivaprakash Murugesan wrote: > This patch adds schema for primary CPU PLL found on few Qualcomm > platforms. > > Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> > --- > [V3] > * Fixed dt binding error in "$id" field. > > .../devicetree/bindings/clock/qcom,a53pll.txt | 22 -------- > .../devicetree/bindings/clock/qcom,a53pll.yaml | 60 ++++++++++++++++++++++ > 2 files changed, 60 insertions(+), 22 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.txt > create mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > > diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt b/Documentation/devicetree/bindings/clock/qcom,a53pll.txt > deleted file mode 100644 > index e3fa811..0000000 > --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt > +++ /dev/null > @@ -1,22 +0,0 @@ > -Qualcomm MSM8916 A53 PLL Binding > --------------------------------- > -The A53 PLL on MSM8916 platforms is the main CPU PLL used used for frequencies > -above 1GHz. > - > -Required properties : > -- compatible : Shall contain only one of the following: > - > - "qcom,msm8916-a53pll" > - > -- reg : shall contain base register location and length > - > -- #clock-cells : must be set to <0> > - > -Example: > - > - a53pll: clock@b016000 { > - compatible = "qcom,msm8916-a53pll"; > - reg = <0xb016000 0x40>; > - #clock-cells = <0>; > - }; > - > diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > new file mode 100644 > index 0000000..c865293 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > @@ -0,0 +1,60 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm A53 PLL Binding > + > +maintainers: > + - Sivaprakash Murugesan <sivaprak@codeaurora.org> > + > +description: > + The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for > + frequencies above 1GHz. > + > +properties: > + compatible: > + enum: > + - qcom,msm8916-a53pll > + - qcom,ipq6018-a53pll > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 0 > + > + clocks: > + description: clocks required for this controller. That's every 'clocks'. Drop. > + maxItems: 1 > + > + clock-names: > + description: clock output names of required clocks. Drop. 'clock-names' are the input names. > + maxItems: 1 Need to define what the names are. > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + > +additionalProperties: false > + > +examples: > + #Example 1 - A53 PLL found on MSM8916 devices > + - | > + a53pll: clock@b016000 { > + compatible = "qcom,msm8916-a53pll"; > + reg = <0xb016000 0x40>; > + #clock-cells = <0>; > + }; > + > + #Example 2 - A53 PLL found on IPQ6018 devices > + - | > + a53pll_ipq: clock@b116000 { > + compatible = "qcom,ipq6018-a53pll"; > + reg = <0x0b116000 0x40>; > + #clock-cells = <0>; > + clocks = <&xo>; > + clock-names = "xo"; > + }; > -- > 2.7.4 >
On Tue, Apr 14, 2020 at 08:25:16AM +0530, Sivaprakash Murugesan wrote: > This patch adds schema for primary CPU PLL found on few Qualcomm > platforms. > > Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> > --- > [V3] > * Fixed dt binding error in "$id" field. > > .../devicetree/bindings/clock/qcom,a53pll.txt | 22 -------- > .../devicetree/bindings/clock/qcom,a53pll.yaml | 60 ++++++++++++++++++++++ > 2 files changed, 60 insertions(+), 22 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.txt > create mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > > diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt b/Documentation/devicetree/bindings/clock/qcom,a53pll.txt > deleted file mode 100644 > index e3fa811..0000000 > --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt > +++ /dev/null > @@ -1,22 +0,0 @@ > -Qualcomm MSM8916 A53 PLL Binding > --------------------------------- > -The A53 PLL on MSM8916 platforms is the main CPU PLL used used for frequencies > -above 1GHz. > - > -Required properties : > -- compatible : Shall contain only one of the following: > - > - "qcom,msm8916-a53pll" > - > -- reg : shall contain base register location and length > - > -- #clock-cells : must be set to <0> > - > -Example: > - > - a53pll: clock@b016000 { > - compatible = "qcom,msm8916-a53pll"; > - reg = <0xb016000 0x40>; > - #clock-cells = <0>; > - }; > - > diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > new file mode 100644 > index 0000000..c865293 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > @@ -0,0 +1,60 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm A53 PLL Binding > + > +maintainers: > + - Sivaprakash Murugesan <sivaprak@codeaurora.org> > + > +description: > + The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for > + frequencies above 1GHz. > + > +properties: > + compatible: > + enum: > + - qcom,msm8916-a53pll > + - qcom,ipq6018-a53pll This new compatible goes in the next patch. > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 0 > + > + clocks: > + description: clocks required for this controller. > + maxItems: 1 > + > + clock-names: > + description: clock output names of required clocks. > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + > +additionalProperties: false > + > +examples: > + #Example 1 - A53 PLL found on MSM8916 devices > + - | > + a53pll: clock@b016000 { > + compatible = "qcom,msm8916-a53pll"; > + reg = <0xb016000 0x40>; > + #clock-cells = <0>; > + }; > + > + #Example 2 - A53 PLL found on IPQ6018 devices > + - | > + a53pll_ipq: clock@b116000 { > + compatible = "qcom,ipq6018-a53pll"; > + reg = <0x0b116000 0x40>; > + #clock-cells = <0>; > + clocks = <&xo>; > + clock-names = "xo"; > + }; > -- > 2.7.4 >
On 4/21/2020 2:29 AM, Rob Herring wrote: > On Tue, Apr 14, 2020 at 08:25:15AM +0530, Sivaprakash Murugesan wrote: >> Qualcomm APCS global block provides a bunch of generic properties which >> are required in a device tree. Add YAML schema for these properties. >> >> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> >> --- >> .../bindings/mailbox/qcom,apcs-kpss-global.txt | 88 ---------------------- >> .../bindings/mailbox/qcom,apcs-kpss-global.yaml | 88 ++++++++++++++++++++++ >> 2 files changed, 88 insertions(+), 88 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt >> create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml >> >> diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt >> deleted file mode 100644 >> index beec612..0000000 >> --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt >> +++ /dev/null >> @@ -1,88 +0,0 @@ >> -Binding for the Qualcomm APCS global block >> -========================================== >> - >> -This binding describes the APCS "global" block found in various Qualcomm >> -platforms. >> - >> -- compatible: >> - Usage: required >> - Value type: <string> >> - Definition: must be one of: >> - "qcom,msm8916-apcs-kpss-global", >> - "qcom,msm8996-apcs-hmss-global" >> - "qcom,msm8998-apcs-hmss-global" >> - "qcom,qcs404-apcs-apps-global" >> - "qcom,sc7180-apss-shared" >> - "qcom,sdm845-apss-shared" >> - "qcom,sm8150-apss-shared" >> - "qcom,ipq8074-apcs-apps-global" >> - >> -- reg: >> - Usage: required >> - Value type: <prop-encoded-array> >> - Definition: must specify the base address and size of the global block >> - >> -- clocks: >> - Usage: required if #clock-names property is present >> - Value type: <phandle array> >> - Definition: phandles to the two parent clocks of the clock driver. >> - >> -- #mbox-cells: >> - Usage: required >> - Value type: <u32> >> - Definition: as described in mailbox.txt, must be 1 >> - >> -- #clock-cells: >> - Usage: optional >> - Value type: <u32> >> - Definition: as described in clock.txt, must be 0 >> - >> -- clock-names: >> - Usage: required if the platform data based clock driver needs to >> - retrieve the parent clock names from device tree. >> - This will requires two mandatory clocks to be defined. >> - Value type: <string-array> >> - Definition: must be "pll" and "aux" >> - >> -= EXAMPLE >> -The following example describes the APCS HMSS found in MSM8996 and part of the >> -GLINK RPM referencing the "rpm_hlos" doorbell therein. >> - >> - apcs_glb: mailbox@9820000 { >> - compatible = "qcom,msm8996-apcs-hmss-global"; >> - reg = <0x9820000 0x1000>; >> - >> - #mbox-cells = <1>; >> - }; >> - >> - rpm-glink { >> - compatible = "qcom,glink-rpm"; >> - >> - interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; >> - >> - qcom,rpm-msg-ram = <&rpm_msg_ram>; >> - >> - mboxes = <&apcs_glb 0>; >> - mbox-names = "rpm_hlos"; >> - }; >> - >> -Below is another example of the APCS binding on MSM8916 platforms: >> - >> - apcs: mailbox@b011000 { >> - compatible = "qcom,msm8916-apcs-kpss-global"; >> - reg = <0xb011000 0x1000>; >> - #mbox-cells = <1>; >> - clocks = <&a53pll>; >> - #clock-cells = <0>; >> - }; >> - >> -Below is another example of the APCS binding on QCS404 platforms: >> - >> - apcs_glb: mailbox@b011000 { >> - compatible = "qcom,qcs404-apcs-apps-global", "syscon"; >> - reg = <0x0b011000 0x1000>; >> - #mbox-cells = <1>; >> - clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>; >> - clock-names = "pll", "aux"; >> - #clock-cells = <0>; >> - }; >> diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml >> new file mode 100644 >> index 0000000..b46474b >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml >> @@ -0,0 +1,88 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#" >> +$schema: "http://devicetree.org/meta-schemas/core.yaml#" >> + >> +title: Qualcomm APCS global block bindings >> + >> +description: >> + This binding describes the APCS "global" block found in various Qualcomm >> + platforms. >> + >> +maintainers: >> + - Sivaprakash Murugesan <sivaprak@codeaurora.org> >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,ipq8074-apcs-apps-global >> + - qcom,msm8916-apcs-kpss-global >> + - qcom,msm8996-apcs-hmss-global >> + - qcom,msm8998-apcs-hmss-global >> + - qcom,qcs404-apcs-apps-global >> + - qcom,sc7180-apss-shared >> + - qcom,sdm845-apss-shared >> + - qcom,sm8150-apss-shared >> + >> + reg: >> + description: specifies the base address and size of the global block > Can drop this. ok. > >> + maxItems: 1 >> + >> + clocks: >> + description: phandles to the parent clocks of the clock driver > Need to define how many and what each one is. ok. > >> + >> + '#mbox-cells': >> + const: 1 >> + >> + '#clock-cells': >> + const: 0 >> + >> + clock-names: >> + description: >> + parent clock names, required if the platform data based clock driver >> + needs to retrieve the parent clock names from device tree. > Drop. ok. > >> + maxItems: 2 > Not needed as 'items' implies this. ok.