| Message ID | 6e62147c36c76b9485d14960dced4f6acda17591.1590947174.git.saiprakash.ranjan@codeaurora.org |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] coresight: tmc: Add enable flag to indicate the status of ETR/ETF | expand |
Hi, On Mon, 1 Jun 2020 at 09:02, Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> wrote: > > Add a flag to check whether TMC ETR/ETF is enabled or not. > This is later used in shutdown callback to determine if > we require to disable ETR/ETF. > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > drivers/hwtracing/coresight/coresight-tmc.c | 2 ++ > drivers/hwtracing/coresight/coresight-tmc.h | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c > index 39fba1d16e6e..5a271ebc4585 100644 > --- a/drivers/hwtracing/coresight/coresight-tmc.c > +++ b/drivers/hwtracing/coresight/coresight-tmc.c > @@ -62,11 +62,13 @@ void tmc_flush_and_stop(struct tmc_drvdata *drvdata) > > void tmc_enable_hw(struct tmc_drvdata *drvdata) > { > + drvdata->enable = true; > writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL); > } > > void tmc_disable_hw(struct tmc_drvdata *drvdata) > { > + drvdata->enable = false; > writel_relaxed(0x0, drvdata->base + TMC_CTL); > } > > diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h > index 71de978575f3..d156860495c7 100644 > --- a/drivers/hwtracing/coresight/coresight-tmc.h > +++ b/drivers/hwtracing/coresight/coresight-tmc.h > @@ -184,6 +184,7 @@ struct etr_buf { > * @idr_mutex: Access serialisation for idr. > * @sysfs_buf: SYSFS buffer for ETR. > * @perf_buf: PERF buffer for ETR. > + * @enable: Indicates whether ETR/ETF is enabled. > */ > struct tmc_drvdata { > void __iomem *base; > @@ -207,6 +208,7 @@ struct tmc_drvdata { > struct mutex idr_mutex; > struct etr_buf *sysfs_buf; > struct etr_buf *perf_buf; > + bool enable; Is this flag needed? For TMC, drvdata->mode indicates if the device is in use. Regards Mike > }; > > struct etr_buf_operations { > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >
Hi Mike, Thanks for the review. On 2020-06-01 18:57, Mike Leach wrote: > Hi, > > On Mon, 1 Jun 2020 at 09:02, Sai Prakash Ranjan > <saiprakash.ranjan@codeaurora.org> wrote: >> >> Add a flag to check whether TMC ETR/ETF is enabled or not. >> This is later used in shutdown callback to determine if >> we require to disable ETR/ETF. >> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> >> --- >> drivers/hwtracing/coresight/coresight-tmc.c | 2 ++ >> drivers/hwtracing/coresight/coresight-tmc.h | 2 ++ >> 2 files changed, 4 insertions(+) >> >> diff --git a/drivers/hwtracing/coresight/coresight-tmc.c >> b/drivers/hwtracing/coresight/coresight-tmc.c >> index 39fba1d16e6e..5a271ebc4585 100644 >> --- a/drivers/hwtracing/coresight/coresight-tmc.c >> +++ b/drivers/hwtracing/coresight/coresight-tmc.c >> @@ -62,11 +62,13 @@ void tmc_flush_and_stop(struct tmc_drvdata >> *drvdata) >> >> void tmc_enable_hw(struct tmc_drvdata *drvdata) >> { >> + drvdata->enable = true; >> writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL); >> } >> >> void tmc_disable_hw(struct tmc_drvdata *drvdata) >> { >> + drvdata->enable = false; >> writel_relaxed(0x0, drvdata->base + TMC_CTL); >> } >> >> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h >> b/drivers/hwtracing/coresight/coresight-tmc.h >> index 71de978575f3..d156860495c7 100644 >> --- a/drivers/hwtracing/coresight/coresight-tmc.h >> +++ b/drivers/hwtracing/coresight/coresight-tmc.h >> @@ -184,6 +184,7 @@ struct etr_buf { >> * @idr_mutex: Access serialisation for idr. >> * @sysfs_buf: SYSFS buffer for ETR. >> * @perf_buf: PERF buffer for ETR. >> + * @enable: Indicates whether ETR/ETF is enabled. >> */ >> struct tmc_drvdata { >> void __iomem *base; >> @@ -207,6 +208,7 @@ struct tmc_drvdata { >> struct mutex idr_mutex; >> struct etr_buf *sysfs_buf; >> struct etr_buf *perf_buf; >> + bool enable; > > Is this flag needed? > For TMC, drvdata->mode indicates if the device is in use. > Yes we can use mode flag, will make this change in the next version. Thanks, Sai
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index 39fba1d16e6e..5a271ebc4585 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -62,11 +62,13 @@ void tmc_flush_and_stop(struct tmc_drvdata *drvdata) void tmc_enable_hw(struct tmc_drvdata *drvdata) { + drvdata->enable = true; writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL); } void tmc_disable_hw(struct tmc_drvdata *drvdata) { + drvdata->enable = false; writel_relaxed(0x0, drvdata->base + TMC_CTL); } diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 71de978575f3..d156860495c7 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -184,6 +184,7 @@ struct etr_buf { * @idr_mutex: Access serialisation for idr. * @sysfs_buf: SYSFS buffer for ETR. * @perf_buf: PERF buffer for ETR. + * @enable: Indicates whether ETR/ETF is enabled. */ struct tmc_drvdata { void __iomem *base; @@ -207,6 +208,7 @@ struct tmc_drvdata { struct mutex idr_mutex; struct etr_buf *sysfs_buf; struct etr_buf *perf_buf; + bool enable; }; struct etr_buf_operations {
Add a flag to check whether TMC ETR/ETF is enabled or not. This is later used in shutdown callback to determine if we require to disable ETR/ETF. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- drivers/hwtracing/coresight/coresight-tmc.c | 2 ++ drivers/hwtracing/coresight/coresight-tmc.h | 2 ++ 2 files changed, 4 insertions(+)