diff mbox series

[v3,14/16] target/arm: Clear tail in gvec_fmul_idx_*, gvec_fmla_idx_*

Message ID 20200508152200.6547-15-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: partial vector cleanup | expand

Commit Message

Richard Henderson May 8, 2020, 3:21 p.m. UTC 
Must clear the tail for AdvSIMD when SVE is enabled.

Fixes: ca40a6e6e39
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/vec_helper.c | 2 ++
 1 file changed, 2 insertions(+)

-- 
2.20.1

Comments

Peter Maydell May 12, 2020, 2:29 p.m. UTC | #1 
On Fri, 8 May 2020 at 16:22, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> Must clear the tail for AdvSIMD when SVE is enabled.

>

> Fixes: ca40a6e6e39

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Peter Maydell <peter.maydell@linaro.org>


Is it worth adding a "Cc: qemu-stable@nongnu.org" ?

thanks
-- PMM
diff mbox series

Patch

diff --git a/target/arm/vec_helper.c b/target/arm/vec_helper.c
index 6aa2ca0827..a483841add 100644
--- a/target/arm/vec_helper.c
+++ b/target/arm/vec_helper.c
@@ -747,6 +747,7 @@  void HELPER(NAME)(void *vd, void *vn, void *vm, void *stat, uint32_t desc) \
             d[i + j] = TYPE##_mul(n[i + j], mm, stat);                     \
         }                                                                  \
     }                                                                      \
+    clear_tail(d, oprsz, simd_maxsz(desc));                                \
 }
 
 DO_MUL_IDX(gvec_fmul_idx_h, float16, H2)
@@ -771,6 +772,7 @@  void HELPER(NAME)(void *vd, void *vn, void *vm, void *va,                  \
                                      mm, a[i + j], 0, stat);               \
         }                                                                  \
     }                                                                      \
+    clear_tail(d, oprsz, simd_maxsz(desc));                                \
 }
 
 DO_FMLA_IDX(gvec_fmla_idx_h, float16, H2)