mbox series

[00/16] target/arm: sve load/store improvements

Message ID 20200311064420.30606-1-richard.henderson@linaro.org
Headers show
Series target/arm: sve load/store improvements | expand

Message

Richard Henderson March 11, 2020, 6:44 a.m. UTC
The goal here is to support MTE, but there's some cleanup to do.

Technically, we have sufficient interfaces in cputlb.c now, but it
requires multiple tlb lookups on different interfaces to do so.

Adding probe_access_flags() allows probing the tlb and getting out
some of the flags buried in the tlb comparator, such as TLB_MMIO
and TLB_WATCHPOINT.  In addition, we get no-fault semantics,
which we don't have via probe_acccess().

Adding cpu_probe_watchpoint() allows to *not* stop a first-fault
or no-fault load when the page contains a watchpoint, but the actual
access does not hit.

Having these available means that we can handle all of the watchpoints
for a given set of loads/stores all at once, before we begin doing any
actual memory operations.  Further, the actual memory operation on a
page of ram that has a watchpoint can still use the fast path.

Looking forward to MTE, we can examine the Tagged bit on a per-page
basis and avoid dozens of mte_check calls that must be Unchecked.
That comes later, in a new version of the MTE patch set, but I do
add comments for where the checks should be added.


r~


Richard Henderson (16):
  accel/tcg: Add block comment for probe_access
  accel/tcg: Add probe_access_flags
  exec: Add cpu_probe_watchpoint
  target/arm: Use cpu_*_data_ra for sve_ldst_tlb_fn
  target/arm: Drop manual handling of set/clear_helper_retaddr
  target/arm: Add sve infrastructure for page lookup
  target/arm: Adjust interface of sve_ld1_host_fn
  target/arm: Use SVEContLdSt in sve_ld1_r
  target/arm: Handle watchpoints in sve_ld1_r
  target/arm: Use SVEContLdSt for multi-register contiguous loads
  target/arm: Update contiguous first-fault and no-fault loads
  target/arm: Use SVEContLdSt for contiguous stores
  target/arm: Reuse sve_probe_page for gather first-fault loads
  target/arm: Reuse sve_probe_page for scatter stores
  target/arm: Reuse sve_probe_page for gather loads
  target/arm: Remove sve_memopidx

 include/exec/cpu-all.h     |   13 +-
 include/exec/exec-all.h    |   39 +
 include/hw/core/cpu.h      |    7 +
 target/arm/internals.h     |    5 -
 accel/tcg/cputlb.c         |  178 +--
 accel/tcg/user-exec.c      |   36 +-
 exec.c                     |   19 +
 target/arm/sve_helper.c    | 2238 +++++++++++++++++++-----------------
 target/arm/translate-sve.c |   17 +-
 9 files changed, 1404 insertions(+), 1148 deletions(-)

-- 
2.20.1

Comments

no-reply@patchew.org March 11, 2020, 7:10 a.m. UTC | #1
Patchew URL: https://patchew.org/QEMU/20200311064420.30606-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PATCH 00/16] target/arm: sve load/store improvements
Message-id: 20200311064420.30606-1-richard.henderson@linaro.org
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
4cb4cfb target/arm: Remove sve_memopidx
9b43c4c target/arm: Reuse sve_probe_page for gather loads
3032a49 target/arm: Reuse sve_probe_page for scatter stores
abf11d7 target/arm: Reuse sve_probe_page for gather first-fault loads
020f874 target/arm: Use SVEContLdSt for contiguous stores
de31b30 target/arm: Update contiguous first-fault and no-fault loads
627528c target/arm: Use SVEContLdSt for multi-register contiguous loads
678a2d7 target/arm: Handle watchpoints in sve_ld1_r
b6827bc target/arm: Use SVEContLdSt in sve_ld1_r
c6fa5f6 target/arm: Adjust interface of sve_ld1_host_fn
ba3d3ce target/arm: Add sve infrastructure for page lookup
0cf3b33 target/arm: Drop manual handling of set/clear_helper_retaddr
7faf8fb target/arm: Use cpu_*_data_ra for sve_ldst_tlb_fn
d8ed5c8 exec: Add cpu_probe_watchpoint
4ff4098 accel/tcg: Add probe_access_flags
4b6c3d0 accel/tcg: Add block comment for probe_access

=== OUTPUT BEGIN ===
1/16 Checking commit 4b6c3d0e10c9 (accel/tcg: Add block comment for probe_access)
2/16 Checking commit 4ff409819099 (accel/tcg: Add probe_access_flags)
WARNING: line over 80 characters
#273: FILE: accel/tcg/user-exec.c:220:
+            cc->tlb_fill(cpu, addr, 0, access_type, MMU_USER_IDX, false, retaddr);

total: 0 errors, 1 warnings, 312 lines checked

Patch 2/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/16 Checking commit d8ed5c85deea (exec: Add cpu_probe_watchpoint)
ERROR: trailing whitespace
#31: FILE: exec.c:2747:
+        if (watchpoint_address_matches(wp, addr, len) && $

total: 1 errors, 0 warnings, 44 lines checked

Patch 3/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

4/16 Checking commit 7faf8fbb5a67 (target/arm: Use cpu_*_data_ra for sve_ldst_tlb_fn)
ERROR: spaces required around that '*' (ctx:WxV)
#176: FILE: target/arm/sve_helper.c:4184:
+                      sve_ldst1_tlb_fn *tlb_fn)
                                        ^

total: 1 errors, 0 warnings, 479 lines checked

Patch 4/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

5/16 Checking commit 0cf3b3397565 (target/arm: Drop manual handling of set/clear_helper_retaddr)
6/16 Checking commit ba3d3cec8772 (target/arm: Add sve infrastructure for page lookup)
7/16 Checking commit c6fa5f6f82a3 (target/arm: Adjust interface of sve_ld1_host_fn)
8/16 Checking commit b6827bcde171 (target/arm: Use SVEContLdSt in sve_ld1_r)
9/16 Checking commit 678a2d7de202 (target/arm: Handle watchpoints in sve_ld1_r)
WARNING: line over 80 characters
#51: FILE: target/arm/sve_helper.c:4408:
+                                         info->page[0].attrs, wp_access, retaddr);

WARNING: line over 80 characters
#75: FILE: target/arm/sve_helper.c:4432:
+                                         info->page[1].attrs, wp_access, retaddr);

total: 0 errors, 2 warnings, 88 lines checked

Patch 9/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/16 Checking commit 627528c11533 (target/arm: Use SVEContLdSt for multi-register contiguous loads)
11/16 Checking commit de31b300b881 (target/arm: Update contiguous first-fault and no-fault loads)
12/16 Checking commit 020f874a48bf (target/arm: Use SVEContLdSt for contiguous stores)
13/16 Checking commit abf11d771910 (target/arm: Reuse sve_probe_page for gather first-fault loads)
14/16 Checking commit 3032a491bbe5 (target/arm: Reuse sve_probe_page for scatter stores)
15/16 Checking commit 9b43c4ccb322 (target/arm: Reuse sve_probe_page for gather loads)
16/16 Checking commit 4cb4cfb45691 (target/arm: Remove sve_memopidx)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200311064420.30606-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
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Please send your feedback to patchew-devel@redhat.com
Peter Maydell April 16, 2020, 2:28 p.m. UTC | #2
On Wed, 11 Mar 2020 at 06:44, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> The goal here is to support MTE, but there's some cleanup to do.

>

> Technically, we have sufficient interfaces in cputlb.c now, but it

> requires multiple tlb lookups on different interfaces to do so.

>

> Adding probe_access_flags() allows probing the tlb and getting out

> some of the flags buried in the tlb comparator, such as TLB_MMIO

> and TLB_WATCHPOINT.  In addition, we get no-fault semantics,

> which we don't have via probe_acccess().

>

> Adding cpu_probe_watchpoint() allows to *not* stop a first-fault

> or no-fault load when the page contains a watchpoint, but the actual

> access does not hit.

>

> Having these available means that we can handle all of the watchpoints

> for a given set of loads/stores all at once, before we begin doing any

> actual memory operations.  Further, the actual memory operation on a

> page of ram that has a watchpoint can still use the fast path.

>

> Looking forward to MTE, we can examine the Tagged bit on a per-page

> basis and avoid dozens of mte_check calls that must be Unchecked.

> That comes later, in a new version of the MTE patch set, but I do

> add comments for where the checks should be added.


Series reviewed; I didn't bother to flag up the checkpatch
complaints, but I think all but one of them are legit, so
please fix those too.

thanks
-- PMM