@@ -37,6 +37,11 @@
#define TIMER3_MATCH2 (0x2c)
#define TIMER_CR (0x30)
+/*
+ Control register set to clear for ast2600 only.
+ */
+#define TIMER_CR_CLR (0x3c)
+
/*
* Control register (TMC30) bit fields for fttmr010/gemini/moxart timers.
*/
@@ -163,6 +168,16 @@ static int fttmr010_timer_set_next_event(unsigned long cycles,
return 0;
}
+static int ast2600_timer_shutdown(struct clock_event_device *evt)
+{
+ struct fttmr010 *fttmr010 = to_fttmr010(evt);
+
+ /* Stop */
+ writel(fttmr010->t1_enable_val, fttmr010->base + TIMER_CR_CLR);
+
+ return 0;
+}
+
static int fttmr010_timer_shutdown(struct clock_event_device *evt)
{
struct fttmr010 *fttmr010 = to_fttmr010(evt);
@@ -244,6 +259,17 @@ static irqreturn_t fttmr010_timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static irqreturn_t ast2600_timer_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *evt = dev_id;
+ struct fttmr010 *fttmr010 = to_fttmr010(evt);
+
+ writel(0x1, fttmr010->base + TIMER_INTR_STATE);
+
+ evt->event_handler(evt);
+ return IRQ_HANDLED;
+}
+
static int __init fttmr010_common_init(struct device_node *np,
bool is_aspeed,
int (*timer_shutdown)(struct clock_event_device *),
@@ -404,6 +430,13 @@ static int __init fttmr010_common_init(struct device_node *np,
return ret;
}
+static __init int ast2600_timer_init(struct device_node *np)
+{
+ return fttmr010_common_init(np, true,
+ ast2600_timer_shutdown,
+ ast2600_timer_interrupt);
+}
+
static __init int aspeed_timer_init(struct device_node *np)
{
return fttmr010_common_init(np, true,
@@ -423,3 +456,4 @@ TIMER_OF_DECLARE(gemini, "cortina,gemini-timer", fttmr010_timer_init);
TIMER_OF_DECLARE(moxart, "moxa,moxart-timer", fttmr010_timer_init);
TIMER_OF_DECLARE(ast2400, "aspeed,ast2400-timer", aspeed_timer_init);
TIMER_OF_DECLARE(ast2500, "aspeed,ast2500-timer", aspeed_timer_init);
+TIMER_OF_DECLARE(ast2600, "aspeed,ast2600-timer", ast2600_timer_init);
The ast2600 has some minor differences to previous versions. The interrupt handler must acknowledge the timer interrupt in a status register. Secondly the control register becomes write to set only, requiring the use of a separate set to clear register. Signed-off-by: Joel Stanley <joel@jms.id.au> --- drivers/clocksource/timer-fttmr010.c | 34 ++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) -- 2.24.0.rc1