| Message ID | 20191013222544.3679-1-richard.henderson@linaro.org |
|---|---|
| Headers | show |
| Series | tcg patch queue | expand |
Patchew URL: https://patchew.org/QEMU/20191013222544.3679-1-richard.henderson@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PULL 00/23] tcg patch queue
Type: series
Message-id: 20191013222544.3679-1-richard.henderson@linaro.org
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Switched to a new branch 'test'
6407be4 cpus: kick all vCPUs when running thread=single
5a14452 tcg/ppc: Update vector support for v3.00 dup/dupi
65f7a9c tcg/ppc: Update vector support for v3.00 load/store
9f16a4d tcg/ppc: Update vector support for v3.00 Altivec
ee0a018 tcg/ppc: Update vector support for v2.07 FP
01bb12c tcg/ppc: Update vector support for v2.07 VSX
e462e25 tcg/ppc: Update vector support for v2.07 Altivec
e55fd3e tcg/ppc: Update vector support for VSX
0381ad7 tcg/ppc: Enable Altivec detection
0e697fc tcg/ppc: Support vector dup2
efe1d0d tcg/ppc: Support vector multiply
bc88d8d tcg/ppc: Support vector shift by immediate
4912f82 tcg/ppc: Add support for vector saturated add/subtract
79cbbdfc tcg/ppc: Add support for vector add/subtract
325d82d tcg/ppc: Add support for vector maximum/minimum
1a6fc18 tcg/ppc: Add support for load/store/logic/comparison
49538b2 tcg/ppc: Enable tcg backend vector compilation
ac2d6b5 tcg/ppc: Replace HAVE_ISEL macro with a variable
7ee5d6b tcg/ppc: Replace HAVE_ISA_2_06
d32d5f4 tcg/ppc: Create TCGPowerISA and have_isa
5278062 tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC()
c9d6cf7 tcg/ppc: Introduce macro VX4()
3795250 tcg/ppc: Introduce Altivec registers
=== OUTPUT BEGIN ===
1/23 Checking commit 3795250e5878 (tcg/ppc: Introduce Altivec registers)
2/23 Checking commit c9d6cf75035c (tcg/ppc: Introduce macro VX4())
ERROR: spaces required around that '|' (ctx:VxV)
#21: FILE: tcg/ppc/tcg-target.inc.c:322:
+#define VX4(opc) (OPCD(4)|(opc))
^
total: 1 errors, 0 warnings, 7 lines checked
Patch 2/23 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/23 Checking commit 527806227bb1 (tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC())
4/23 Checking commit d32d5f48d5cb (tcg/ppc: Create TCGPowerISA and have_isa)
5/23 Checking commit 7ee5d6b3642f (tcg/ppc: Replace HAVE_ISA_2_06)
6/23 Checking commit ac2d6b517c0b (tcg/ppc: Replace HAVE_ISEL macro with a variable)
7/23 Checking commit 49538b220d04 (tcg/ppc: Enable tcg backend vector compilation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#163:
new file mode 100644
total: 0 errors, 1 warnings, 129 lines checked
Patch 7/23 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
8/23 Checking commit 1a6fc18ac9c4 (tcg/ppc: Add support for load/store/logic/comparison)
9/23 Checking commit 325d82d1cc2f (tcg/ppc: Add support for vector maximum/minimum)
10/23 Checking commit 79cbbdfc48b2 (tcg/ppc: Add support for vector add/subtract)
11/23 Checking commit 4912f82f5679 (tcg/ppc: Add support for vector saturated add/subtract)
12/23 Checking commit bc88d8dbca4b (tcg/ppc: Support vector shift by immediate)
13/23 Checking commit efe1d0dee1b4 (tcg/ppc: Support vector multiply)
ERROR: code indent should never use tabs
#133: FILE: tcg/ppc/tcg-target.inc.c:3217:
+^Ibreak;$
total: 1 errors, 0 warnings, 192 lines checked
Patch 13/23 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/23 Checking commit 0e697fcf2254 (tcg/ppc: Support vector dup2)
15/23 Checking commit 0381ad7d25fa (tcg/ppc: Enable Altivec detection)
16/23 Checking commit e55fd3e6de18 (tcg/ppc: Update vector support for VSX)
17/23 Checking commit e462e2599c15 (tcg/ppc: Update vector support for v2.07 Altivec)
18/23 Checking commit 01bb12c7ac24 (tcg/ppc: Update vector support for v2.07 VSX)
19/23 Checking commit ee0a018ad733 (tcg/ppc: Update vector support for v2.07 FP)
20/23 Checking commit 9f16a4d4876f (tcg/ppc: Update vector support for v3.00 Altivec)
21/23 Checking commit 65f7a9c3a801 (tcg/ppc: Update vector support for v3.00 load/store)
22/23 Checking commit 5a144522b801 (tcg/ppc: Update vector support for v3.00 dup/dupi)
23/23 Checking commit 6407be4fe200 (cpus: kick all vCPUs when running thread=single)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20191013222544.3679-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
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Please send your feedback to patchew-devel@redhat.com
On Monday, October 14, 2019, Richard Henderson <richard.henderson@linaro.org> wrote: > The following changes since commit 9e5319ca52a5b9e84d55ad9c36e2c0 > b317a122bb: > > Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into > staging (2019-10-04 18:32:34 +0100) > > are available in the Git repository at: > > https://github.com/rth7680/qemu.git tags/pull-tcg-20191013 > > for you to fetch changes up to d2f86bba6931388e275e8eb4ccd1dbcc7cae6328: > > cpus: kick all vCPUs when running thread=single (2019-10-07 14:08:58 > -0400) > > ---------------------------------------------------------------- OK - great! Congratulations for bringing the series to this final stage! This was not an easy task at all. Our team will be using and enjoying the fruits of this work on our test ppc hosts, that do have an important place in our test bed. Just for the sake of being punctual, may I ask you to add "Tested-by:" for Mark Cave-Ayland, and "Reviewed-by:" for myself to all 22 ppc host patches, as it was indicated in the responses to the last version of the ppc host series? Thank you in advance, and again all kudos for the series! Aleksandar > Host vector support for tcg/ppc. > Fix thread=single cpu kicking. > > ---------------------------------------------------------------- > Alex Bennée (1): > cpus: kick all vCPUs when running thread=single > > Richard Henderson (22): > tcg/ppc: Introduce Altivec registers > tcg/ppc: Introduce macro VX4() > tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC() > tcg/ppc: Create TCGPowerISA and have_isa > tcg/ppc: Replace HAVE_ISA_2_06 > tcg/ppc: Replace HAVE_ISEL macro with a variable > tcg/ppc: Enable tcg backend vector compilation > tcg/ppc: Add support for load/store/logic/comparison > tcg/ppc: Add support for vector maximum/minimum > tcg/ppc: Add support for vector add/subtract > tcg/ppc: Add support for vector saturated add/subtract > tcg/ppc: Support vector shift by immediate > tcg/ppc: Support vector multiply > tcg/ppc: Support vector dup2 > tcg/ppc: Enable Altivec detection > tcg/ppc: Update vector support for VSX > tcg/ppc: Update vector support for v2.07 Altivec > tcg/ppc: Update vector support for v2.07 VSX > tcg/ppc: Update vector support for v2.07 FP > tcg/ppc: Update vector support for v3.00 Altivec > tcg/ppc: Update vector support for v3.00 load/store > tcg/ppc: Update vector support for v3.00 dup/dupi > > tcg/ppc/tcg-target.h | 51 ++- > tcg/ppc/tcg-target.opc.h | 13 + > cpus.c | 24 +- > tcg/ppc/tcg-target.inc.c | 1118 ++++++++++++++++++++++++++++++ > ++++++++++++---- > 4 files changed, 1119 insertions(+), 87 deletions(-) > create mode 100644 tcg/ppc/tcg-target.opc.h > > <br><br>On Monday, October 14, 2019, Richard Henderson <<a href="mailto:richard.henderson@linaro.org">richard.henderson@linaro.org</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">The following changes since commit 9e5319ca52a5b9e84d55ad9c36e2c0<wbr>b317a122bb:<br> <br> Merge remote-tracking branch 'remotes/bonzini/tags/for-<wbr>upstream' into staging (2019-10-04 18:32:34 +0100)<br> <br> are available in the Git repository at:<br> <br> <a href="https://github.com/rth7680/qemu.git" target="_blank">https://github.com/rth7680/<wbr>qemu.git</a> tags/pull-tcg-20191013<br> <br> for you to fetch changes up to d2f86bba6931388e275e8eb4ccd1db<wbr>cc7cae6328:<br> <br> cpus: kick all vCPUs when running thread=single (2019-10-07 14:08:58 -0400)<br> <br> ------------------------------<wbr>------------------------------<wbr>----</blockquote><div><br></div><div>OK - great! Congratulations for bringing the series to this final stage! This was not an easy task at all. Our team will be using and enjoying the fruits of this work on our test ppc hosts, that do have an important place in our test bed.</div><div><br></div><div>Just for the sake of being punctual, may I ask you to add "Tested-by:" for Mark Cave-Ayland, and "Reviewed-by:" for myself to all 22 ppc host patches, as it was indicated in the responses to the last version of the ppc host series?</div><div><br></div><div>Thank you in advance, and again all kudos for the series!</div><div><br></div><div>Aleksandar</div><div><br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> Host vector support for tcg/ppc.<br> Fix thread=single cpu kicking.<br> <br> ------------------------------<wbr>------------------------------<wbr>----<br> Alex Bennée (1):<br> cpus: kick all vCPUs when running thread=single<br> <br> Richard Henderson (22):<br> tcg/ppc: Introduce Altivec registers<br> tcg/ppc: Introduce macro VX4()<br> tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC()<br> tcg/ppc: Create TCGPowerISA and have_isa<br> tcg/ppc: Replace HAVE_ISA_2_06<br> tcg/ppc: Replace HAVE_ISEL macro with a variable<br> tcg/ppc: Enable tcg backend vector compilation<br> tcg/ppc: Add support for load/store/logic/comparison<br> tcg/ppc: Add support for vector maximum/minimum<br> tcg/ppc: Add support for vector add/subtract<br> tcg/ppc: Add support for vector saturated add/subtract<br> tcg/ppc: Support vector shift by immediate<br> tcg/ppc: Support vector multiply<br> tcg/ppc: Support vector dup2<br> tcg/ppc: Enable Altivec detection<br> tcg/ppc: Update vector support for VSX<br> tcg/ppc: Update vector support for v2.07 Altivec<br> tcg/ppc: Update vector support for v2.07 VSX<br> tcg/ppc: Update vector support for v2.07 FP<br> tcg/ppc: Update vector support for v3.00 Altivec<br> tcg/ppc: Update vector support for v3.00 load/store<br> tcg/ppc: Update vector support for v3.00 dup/dupi<br> <br> tcg/ppc/tcg-target.h | 51 ++-<br> tcg/ppc/tcg-target.opc.h | 13 +<br> cpus.c | 24 +-<br> tcg/ppc/tcg-target.inc.c | 1118 ++++++++++++++++++++++++++++++<wbr>++++++++++++----<br> 4 files changed, 1119 insertions(+), 87 deletions(-)<br> create mode 100644 tcg/ppc/tcg-target.opc.h<br> <br> </blockquote>
On 10/13/19 4:53 PM, Aleksandar Markovic wrote: > Just for the sake of being punctual, may I ask you to add "Tested-by:" for Mark > Cave-Ayland, and "Reviewed-by:" for myself to all 22 ppc host patches, as it > was indicated in the responses to the last version of the ppc host series? I did add your r-b to those patches that didn't already have your s-o-b. I added Mark's T-b to patch 15, which is the one that enables basic altivec. Mark said that he was testing ppc32 and I know that he's got a G4. He would not have tested the later patches with that hardware. r~
On Monday, October 14, 2019, Richard Henderson <richard.henderson@linaro.org> wrote: > On 10/13/19 4:53 PM, Aleksandar Markovic wrote: > > Just for the sake of being punctual, may I ask you to add "Tested-by:" > for Mark > > Cave-Ayland, and "Reviewed-by:" for myself to all 22 ppc host patches, > as it > > was indicated in the responses to the last version of the ppc host > series? > > I did add your r-b to those patches that didn't already have your s-o-b. > > I added Mark's T-b to patch 15, which is the one that enables basic > altivec. > Mark said that he was testing ppc32 and I know that he's got a G4. He > would > not have tested the later patches with that hardware. > > > Mark tested the whole series, applied to his test bed. This means that all patches are tested for a particular setup - for example, among other things, he established that the patches that are supposed to directly impact different setups do not cause regressions on his setup. I responded to the cover letter with "r-b for all patches", and would like that to be recorded. Aleksandar > r~ > <br><br>On Monday, October 14, 2019, Richard Henderson <<a href="mailto:richard.henderson@linaro.org">richard.henderson@linaro.org</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">On 10/13/19 4:53 PM, Aleksandar Markovic wrote:<br> > Just for the sake of being punctual, may I ask you to add "Tested-by:" for Mark<br> > Cave-Ayland, and "Reviewed-by:" for myself to all 22 ppc host patches, as it<br> > was indicated in the responses to the last version of the ppc host series?<br> <br> I did add your r-b to those patches that didn't already have your s-o-b.<br> <br> I added Mark's T-b to patch 15, which is the one that enables basic altivec.<br> Mark said that he was testing ppc32 and I know that he's got a G4. He would<br> not have tested the later patches with that hardware.<br> <br> <br></blockquote><div><br></div><div>Mark tested the whole series, applied to his test bed. This means that all patches are tested for a particular setup - for example, among other things, he established that the patches that are supposed to directly impact different setups do not cause regressions on his setup.</div><div><br></div><div>I responded to the cover letter with "r-b for all patches", and would like that to be recorded.</div><div><br></div><div>Aleksandar</div><div> <br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> r~<br> </blockquote>
On 10/13/19 3:25 PM, Richard Henderson wrote: > The following changes since commit 9e5319ca52a5b9e84d55ad9c36e2c0b317a122bb: > > Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2019-10-04 18:32:34 +0100) > > are available in the Git repository at: > > https://github.com/rth7680/qemu.git tags/pull-tcg-20191013 I have regenerated the pull with the same tag, including the r-b and t-b that Aleksandar requested. r~ > > for you to fetch changes up to d2f86bba6931388e275e8eb4ccd1dbcc7cae6328: > > cpus: kick all vCPUs when running thread=single (2019-10-07 14:08:58 -0400) > > ---------------------------------------------------------------- > Host vector support for tcg/ppc. > Fix thread=single cpu kicking. > > ---------------------------------------------------------------- > Alex Bennée (1): > cpus: kick all vCPUs when running thread=single > > Richard Henderson (22): > tcg/ppc: Introduce Altivec registers > tcg/ppc: Introduce macro VX4() > tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC() > tcg/ppc: Create TCGPowerISA and have_isa > tcg/ppc: Replace HAVE_ISA_2_06 > tcg/ppc: Replace HAVE_ISEL macro with a variable > tcg/ppc: Enable tcg backend vector compilation > tcg/ppc: Add support for load/store/logic/comparison > tcg/ppc: Add support for vector maximum/minimum > tcg/ppc: Add support for vector add/subtract > tcg/ppc: Add support for vector saturated add/subtract > tcg/ppc: Support vector shift by immediate > tcg/ppc: Support vector multiply > tcg/ppc: Support vector dup2 > tcg/ppc: Enable Altivec detection > tcg/ppc: Update vector support for VSX > tcg/ppc: Update vector support for v2.07 Altivec > tcg/ppc: Update vector support for v2.07 VSX > tcg/ppc: Update vector support for v2.07 FP > tcg/ppc: Update vector support for v3.00 Altivec > tcg/ppc: Update vector support for v3.00 load/store > tcg/ppc: Update vector support for v3.00 dup/dupi > > tcg/ppc/tcg-target.h | 51 ++- > tcg/ppc/tcg-target.opc.h | 13 + > cpus.c | 24 +- > tcg/ppc/tcg-target.inc.c | 1118 ++++++++++++++++++++++++++++++++++++++++++---- > 4 files changed, 1119 insertions(+), 87 deletions(-) > create mode 100644 tcg/ppc/tcg-target.opc.h >
On Thu, 17 Oct 2019 at 15:55, Richard Henderson <richard.henderson@linaro.org> wrote: > > On 10/13/19 3:25 PM, Richard Henderson wrote: > > The following changes since commit 9e5319ca52a5b9e84d55ad9c36e2c0b317a122bb: > > > > Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2019-10-04 18:32:34 +0100) > > > > are available in the Git repository at: > > > > https://github.com/rth7680/qemu.git tags/pull-tcg-20191013 > > > I have regenerated the pull with the same tag, including > the r-b and t-b that Aleksandar requested. Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/4.2 for any user-visible changes. -- PMM
The following changes since commit 9e5319ca52a5b9e84d55ad9c36e2c0b317a122bb: Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2019-10-04 18:32:34 +0100) are available in the Git repository at: https://github.com/rth7680/qemu.git tags/pull-tcg-20191013 for you to fetch changes up to d2f86bba6931388e275e8eb4ccd1dbcc7cae6328: cpus: kick all vCPUs when running thread=single (2019-10-07 14:08:58 -0400) ---------------------------------------------------------------- Host vector support for tcg/ppc. Fix thread=single cpu kicking. ---------------------------------------------------------------- Alex Bennée (1): cpus: kick all vCPUs when running thread=single Richard Henderson (22): tcg/ppc: Introduce Altivec registers tcg/ppc: Introduce macro VX4() tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC() tcg/ppc: Create TCGPowerISA and have_isa tcg/ppc: Replace HAVE_ISA_2_06 tcg/ppc: Replace HAVE_ISEL macro with a variable tcg/ppc: Enable tcg backend vector compilation tcg/ppc: Add support for load/store/logic/comparison tcg/ppc: Add support for vector maximum/minimum tcg/ppc: Add support for vector add/subtract tcg/ppc: Add support for vector saturated add/subtract tcg/ppc: Support vector shift by immediate tcg/ppc: Support vector multiply tcg/ppc: Support vector dup2 tcg/ppc: Enable Altivec detection tcg/ppc: Update vector support for VSX tcg/ppc: Update vector support for v2.07 Altivec tcg/ppc: Update vector support for v2.07 VSX tcg/ppc: Update vector support for v2.07 FP tcg/ppc: Update vector support for v3.00 Altivec tcg/ppc: Update vector support for v3.00 load/store tcg/ppc: Update vector support for v3.00 dup/dupi tcg/ppc/tcg-target.h | 51 ++- tcg/ppc/tcg-target.opc.h | 13 + cpus.c | 24 +- tcg/ppc/tcg-target.inc.c | 1118 ++++++++++++++++++++++++++++++++++++++++++---- 4 files changed, 1119 insertions(+), 87 deletions(-) create mode 100644 tcg/ppc/tcg-target.opc.h