| Message ID | 20190722213958.5761-20-julien.grall@arm.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | xen/arm: Rework head.S to make it more compliant with the Arm Arm | expand |
On Mon, 22 Jul 2019, Julien Grall wrote: > The current boot code is using the pattern ldr rX, =... to move an > immediate constant into a 32-bit register. > > This pattern implies to load the immediate constant from a literal pool, > meaning a memory access will be performed. > > The memory access can be avoided by using movw/movt instructions. > > A new macro is introduced to move an immediate constant into a 32-bit > register without a memory load. Follow-up patches will make use of it. > > Signed-off-by: Julien Grall <julien.grall@arm.com> That's interesting! Acked-by: Stefano Stabellini <sstabellini@kernel.org> > --- > Changes in v2: > - Patch added > --- > xen/arch/arm/arm32/head.S | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S > index 18ded49a04..99f4af18d8 100644 > --- a/xen/arch/arm/arm32/head.S > +++ b/xen/arch/arm/arm32/head.S > @@ -37,6 +37,15 @@ > #endif > > /* > + * Move an immediate constant into a 32-bit register using movw/movt > + * instructions. > + */ > +.macro mov_w reg, word > + movw \reg, #:lower16:\word > + movt \reg, #:upper16:\word > +.endm > + > +/* > * Common register usage in this file: > * r0 - > * r1 - > -- > 2.11.0 >
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 18ded49a04..99f4af18d8 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -37,6 +37,15 @@ #endif /* + * Move an immediate constant into a 32-bit register using movw/movt + * instructions. + */ +.macro mov_w reg, word + movw \reg, #:lower16:\word + movt \reg, #:upper16:\word +.endm + +/* * Common register usage in this file: * r0 - * r1 -
The current boot code is using the pattern ldr rX, =... to move an immediate constant into a 32-bit register. This pattern implies to load the immediate constant from a literal pool, meaning a memory access will be performed. The memory access can be avoided by using movw/movt instructions. A new macro is introduced to move an immediate constant into a 32-bit register without a memory load. Follow-up patches will make use of it. Signed-off-by: Julien Grall <julien.grall@arm.com> --- Changes in v2: - Patch added --- xen/arch/arm/arm32/head.S | 9 +++++++++ 1 file changed, 9 insertions(+)