| Message ID | 1562668156-12927-1-git-send-email-hayashi.kunihiko@socionext.com |
|---|---|
| Headers | show |
| Series | pinctrl: uniphier: Add some improvements and new settings | expand |
On Tue, Jul 9, 2019 at 12:29 PM Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote: > This series adds some improvements and new settings for pin-mux. > > Kunihiko Hayashi (5): > pinctrl: uniphier: Separate modem group from UART ctsrts group > pinctrl: uniphier: Add another audio I/O pin-mux settings for LD20 > pinctrl: uniphier: Add 4th LD20 MPEG2-TS input pin-mux setting > pinctrl: uniphier: Add Pro5 PCIe pin-mux settings > pinctrl: uniphier: Fix Pro5 SD pin-mux setting Looks fine to me. Masahiro, can I have your ACK/review on these patches? Yours, Linus Walleij
On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote: > > This adds support for pinmux settings of aout1b groups. This group includes > aout1 signals derived from xirq pins. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c > index 28e54b3..2c66e70 100644 > --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c > +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c > @@ -544,6 +544,8 @@ static const struct pinctrl_pin_desc uniphier_ld20_pins[] = { > > static const unsigned aout1_pins[] = {137, 138, 139, 140, 141, 142}; > static const int aout1_muxvals[] = {0, 0, 0, 0, 0, 0}; > +static const unsigned aout1b_pins[] = {150, 151, 152, 153, 154, 155, 156}; > +static const int aout1b_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; > static const unsigned aoutiec1_pins[] = {135, 136}; > static const int aoutiec1_muxvals[] = {0, 0}; > static const unsigned int emmc_pins[] = {19, 20, 21, 22, 23, 24, 25}; > @@ -664,6 +666,7 @@ static const unsigned int gpio_range2_pins[] = { > > static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { > UNIPHIER_PINCTRL_GROUP(aout1), > + UNIPHIER_PINCTRL_GROUP(aout1b), > UNIPHIER_PINCTRL_GROUP(aoutiec1), > UNIPHIER_PINCTRL_GROUP(emmc), > UNIPHIER_PINCTRL_GROUP(emmc_dat8), > @@ -708,6 +711,7 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { > }; > > static const char * const aout1_groups[] = {"aout1"}; > +static const char * const aout1b_groups[] = {"aout1b"}; If this has the same functionality as "aout1", shouldn't it be a part of aout1_groups? -- Best Regards Masahiro Yamada
On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote: > > It depends on the board implementation whether to have each pins of > CTS/RTS, and others for modem. So it is necessary to divide current > uart_ctsrts group into uart_ctsrts and uart_modem groups. > > Since the number of implemented pins for modem differs depending > on SoC, each uart_modem group also has a different number of pins. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > index 414ff3a..d1ed5b7 100644 > --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > @@ -780,8 +780,10 @@ static const unsigned system_bus_cs5_pins[] = {55}; > static const int system_bus_cs5_muxvals[] = {6}; > static const unsigned uart0_pins[] = {135, 136}; > static const int uart0_muxvals[] = {3, 3}; > -static const unsigned uart0_ctsrts_pins[] = {137, 138, 139, 140, 141, 124}; > -static const int uart0_ctsrts_muxvals[] = {3, 3, 3, 3, 3, 3}; > +static const unsigned uart0_ctsrts_pins[] = {137, 139}; > +static const int uart0_ctsrts_muxvals[] = {3, 3}; > +static const unsigned uart0_modem_pins[] = {138, 140, 141, 124}; Please sort this array while you are here. Otherwise, looks good to me. -- Best Regards Masahiro Yamada
On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote: > > SD uses the following pins starting from 247: > SDCD, SDWP, SDVOLC, SDCLK, SDCMD, SDDAT{0,1,2,3} > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> > --- > drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c > index 577f12e..22ce0a5 100644 > --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c > +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c > @@ -807,7 +807,7 @@ static const unsigned nand_pins[] = {19, 20, 21, 22, 23, 24, 25, 28, 29, 30, > static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; > static const unsigned nand_cs1_pins[] = {26, 27}; > static const int nand_cs1_muxvals[] = {0, 0}; > -static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258}; > +static const unsigned sd_pins[] = {247, 248, 249, 250, 251, 252, 253, 254, 255}; > static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; > static const unsigned spi0_pins[] = {120, 121, 122, 123}; > static const int spi0_muxvals[] = {0, 0, 0, 0}; > -- > 2.7.4 > -- Best Regards Masahiro Yamada
Hello, On Mon, 29 Jul 2019 22:45:01 +0900 <yamada.masahiro@socionext.com> wrote: > On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi > <hayashi.kunihiko@socionext.com> wrote: > > > > It depends on the board implementation whether to have each pins of > > CTS/RTS, and others for modem. So it is necessary to divide current > > uart_ctsrts group into uart_ctsrts and uart_modem groups. > > > > Since the number of implemented pins for modem differs depending > > on SoC, each uart_modem group also has a different number of pins. > > > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > > --- > > > diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > > index 414ff3a..d1ed5b7 100644 > > --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > > +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > > @@ -780,8 +780,10 @@ static const unsigned system_bus_cs5_pins[] = {55}; > > static const int system_bus_cs5_muxvals[] = {6}; > > static const unsigned uart0_pins[] = {135, 136}; > > static const int uart0_muxvals[] = {3, 3}; > > -static const unsigned uart0_ctsrts_pins[] = {137, 138, 139, 140, 141, 124}; > > -static const int uart0_ctsrts_muxvals[] = {3, 3, 3, 3, 3, 3}; > > +static const unsigned uart0_ctsrts_pins[] = {137, 139}; > > +static const int uart0_ctsrts_muxvals[] = {3, 3}; > > +static const unsigned uart0_modem_pins[] = {138, 140, 141, 124}; > > Please sort this array > while you are here. Thank you for pointing out. I'll sort it in v2. > > Otherwise, looks good to me. > > > > > > > -- > Best Regards > Masahiro Yamada --- Best Regards, Kunihiko Hayashi
Hello, On Mon, 29 Jul 2019 22:44:27 +0900 <yamada.masahiro@socionext.com> wrote: > On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi > <hayashi.kunihiko@socionext.com> wrote: > > > > This adds support for pinmux settings of aout1b groups. This group includes > > aout1 signals derived from xirq pins. > > > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > > --- > > drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c > > index 28e54b3..2c66e70 100644 > > --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c > > +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c > > @@ -544,6 +544,8 @@ static const struct pinctrl_pin_desc uniphier_ld20_pins[] = { > > > > static const unsigned aout1_pins[] = {137, 138, 139, 140, 141, 142}; > > static const int aout1_muxvals[] = {0, 0, 0, 0, 0, 0}; > > +static const unsigned aout1b_pins[] = {150, 151, 152, 153, 154, 155, 156}; > > +static const int aout1b_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; > > static const unsigned aoutiec1_pins[] = {135, 136}; > > static const int aoutiec1_muxvals[] = {0, 0}; > > static const unsigned int emmc_pins[] = {19, 20, 21, 22, 23, 24, 25}; > > @@ -664,6 +666,7 @@ static const unsigned int gpio_range2_pins[] = { > > > > static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { > > UNIPHIER_PINCTRL_GROUP(aout1), > > + UNIPHIER_PINCTRL_GROUP(aout1b), > > UNIPHIER_PINCTRL_GROUP(aoutiec1), > > UNIPHIER_PINCTRL_GROUP(emmc), > > UNIPHIER_PINCTRL_GROUP(emmc_dat8), > > @@ -708,6 +711,7 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { > > }; > > > > static const char * const aout1_groups[] = {"aout1"}; > > +static const char * const aout1b_groups[] = {"aout1b"}; > > If this has the same functionality as "aout1", > shouldn't it be a part of aout1_groups? Indeed. I'll merge "aout1b" with aout1_groups. > > > > > -- > Best Regards > Masahiro Yamada --- Best Regards, Kunihiko Hayashi