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[v4,0/4] arm64: SPE ACPI enablement

Message ID 20190615010910.33921-1-jeremy.linton@arm.com
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Series arm64: SPE ACPI enablement | expand

Message

Jeremy Linton June 15, 2019, 1:09 a.m. UTC 
This patch series enables the Arm Statistical Profiling
Extension (SPE) on ACPI platforms.

This is possible because ACPI 6.3 uses a previously
reserved field in the MADT to store the SPE interrupt
number, similarly to how the normal PMU is described.
If a consistent valid interrupt exists across all the
cores in the system, a platform device is registered.
That then triggers the SPE module, which runs as normal.

We also add the ability to parse the PPTT for IDENTICAL
cores. We then use this to sanity check the single SPE
device we create. This creates a bit of a problem with
respect to the specification though. The specification
says that its legal for multiple tree's to exist in the
PPTT. We handle this fine, but what happens in the
case of multiple tree's is that the lack of a common
node with IDENTICAL set forces us to assume that there
are multiple non-IDENTICAL cores in the machine.

v3->v4: Rebase to 5.2.
	Minor formatting, patch rearrangement.
	Add missing `inline` in static header definition.
	Drop ARM_SPE_ACPI and just use ARM_SPE_PMU.

v2->v3: Previously a function pointer was being used
	  to handle the more complex node checking
	  required by the IDENTICAL flag. This version
	  simply checks for the IDENTICAL flag and calls
	  flag_identical() to preform the revision
	  and next node checks. (I think after reading
	  Raphael's comments for the Nth time, this is
	  actually what he was suggesting, which I
	  initially miss interpreted).
	Modify subject of first patch so that its clear
	  a that its a capitalization change rather,
	  than a logical C 'case' change.

v1->v2: Wrap the code which creates the SPE device in
	    a new CONFIG_ARM_SPE_ACPI ifdef.
	Move arm,spe-v1 device name into common header file
	Some comment/case sensitivity/function name changes.

Jeremy Linton (4):
  ACPI/PPTT: Modify node flag detection to find last IDENTICAL
  ACPI/PPTT: Add function to return ACPI 6.3 Identical tokens
  arm_pmu: acpi: spe: Add initial MADT/SPE probing
  perf: arm_spe: Enable ACPI/Platform automatic module loading

 arch/arm64/include/asm/acpi.h |  3 ++
 drivers/acpi/pptt.c           | 61 +++++++++++++++++++++++++---
 drivers/perf/arm_pmu_acpi.c   | 75 +++++++++++++++++++++++++++++++++++
 drivers/perf/arm_spe_pmu.c    | 12 +++++-
 include/linux/acpi.h          |  5 +++
 include/linux/perf/arm_pmu.h  |  2 +
 6 files changed, 150 insertions(+), 8 deletions(-)

-- 
2.21.0

Comments

Hanjun Guo June 17, 2019, 8:36 a.m. UTC | #1 
On 2019/6/15 9:09, Jeremy Linton wrote:
> This patch series enables the Arm Statistical Profiling

> Extension (SPE) on ACPI platforms.

> 

> This is possible because ACPI 6.3 uses a previously

> reserved field in the MADT to store the SPE interrupt

> number, similarly to how the normal PMU is described.

> If a consistent valid interrupt exists across all the

> cores in the system, a platform device is registered.

> That then triggers the SPE module, which runs as normal.

> 

> We also add the ability to parse the PPTT for IDENTICAL

> cores. We then use this to sanity check the single SPE

> device we create. This creates a bit of a problem with

> respect to the specification though. The specification

> says that its legal for multiple tree's to exist in the

> PPTT. We handle this fine, but what happens in the

> case of multiple tree's is that the lack of a common

> node with IDENTICAL set forces us to assume that there

> are multiple non-IDENTICAL cores in the machine.

> 

> v3->v4: Rebase to 5.2.

> 	Minor formatting, patch rearrangement.

> 	Add missing `inline` in static header definition.

> 	Drop ARM_SPE_ACPI and just use ARM_SPE_PMU.


Tested on top of 5.2-rc1, I can see in the boot log:

arm_spe_pmu arm,spe-v1: probed for CPUs 0-95 [max_record_sz 128, align 4, features 0x7]

and I also tested perf record, and works as expected,

Tested-by: Hanjun Guo <guohanjun@huawei.com>


Thanks
Hanjun
Will Deacon June 18, 2019, 4:42 p.m. UTC | #2 
On Fri, Jun 14, 2019 at 08:09:06PM -0500, Jeremy Linton wrote:
> This patch series enables the Arm Statistical Profiling

> Extension (SPE) on ACPI platforms.

> 

> This is possible because ACPI 6.3 uses a previously

> reserved field in the MADT to store the SPE interrupt

> number, similarly to how the normal PMU is described.

> If a consistent valid interrupt exists across all the

> cores in the system, a platform device is registered.

> That then triggers the SPE module, which runs as normal.

> 

> We also add the ability to parse the PPTT for IDENTICAL

> cores. We then use this to sanity check the single SPE

> device we create. This creates a bit of a problem with

> respect to the specification though. The specification

> says that its legal for multiple tree's to exist in the

> PPTT. We handle this fine, but what happens in the

> case of multiple tree's is that the lack of a common

> node with IDENTICAL set forces us to assume that there

> are multiple non-IDENTICAL cores in the machine.

> 

> v3->v4: Rebase to 5.2.

> 	Minor formatting, patch rearrangement.

> 	Add missing `inline` in static header definition.

> 	Drop ARM_SPE_ACPI and just use ARM_SPE_PMU.


I'm happy to take this via the arm64 perf tree for 5.3, but I'll need
Acks from Raphael on the first two patches and an Ack from Lorenzo on
patch 3.

Cheers,

Will