| Message ID | 20190610020218.9228-1-richard.henderson@linaro.org |
|---|---|
| Headers | show |
| Series | tcg: Move the softmmu tlb to CPUNegativeOffsetState | expand |
Patchew URL: https://patchew.org/QEMU/20190610020218.9228-1-richard.henderson@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState Type: series Message-id: 20190610020218.9228-1-richard.henderson@linaro.org === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === From https://github.com/patchew-project/qemu * [new tag] patchew/20190610020218.9228-1-richard.henderson@linaro.org -> patchew/20190610020218.9228-1-richard.henderson@linaro.org Switched to a new branch 'test' f8067abe5e tcg/arm: Remove mostly unreachable tlb special case b4d1d7bc09 tcg/arm: Use LDRD to load tlb mask+table be59611fe1 tcg/aarch64: Use LDP to load tlb mask+table 900e66f512 cpu: Remove CPU_COMMON a4fac0a5bb cpu: Move the softmmu tlb to CPUNegativeOffsetState 592f9cd7be cpu: Move icount_decr to CPUNegativeOffsetState 5d88cb4c74 cpu: Introduce CPUNegativeOffsetState 8738203974 cpu: Introduce cpu_set_cpustate_pointers c07ad1f754 cpu: Move ENV_OFFSET to exec/gen-icount.h 654b7cd617 target/xtensa: Use env_cpu, env_archcpu 1a04031ecf target/unicore32: Use env_cpu, env_archcpu b2f0db1902 target/tricore: Use env_cpu 69c740b73e target/tilegx: Use env_cpu 0657035fcf target/sparc: Use env_cpu, env_archcpu 60421aa3ea target/sh4: Use env_cpu, env_archcpu ef5a6cdf19 target/s390x: Use env_cpu, env_archcpu 1d8cb96d06 target/riscv: Use env_cpu, env_archcpu bc5af03f86 target/ppc: Use env_cpu, env_archcpu 5169c43239 target/openrisc: Use env_cpu, env_archcpu b7d6b5a9f3 target/nios2: Use env_cpu, env_archcpu efb1f9fc5f target/moxie: Use env_cpu, env_archcpu 83010ca82d target/mips: Use env_cpu, env_archcpu e9df418dae target/microblaze: Use env_cpu, env_archcpu c6259dfc15 target/m68k: Use env_cpu 0e6090a49a target/lm32: Use env_cpu, env_archcpu 81e38e0ad8 target/i386: Use env_cpu, env_archcpu b86f02848e target/hppa: Use env_cpu, env_archcpu d54ea138a2 target/cris: Use env_cpu, env_archcpu 10ae9394cf target/cris: Reindent op_helper.c c84257154c target/cris: Reindent mmu.c 07655a9400 target/arm: Use env_cpu, env_archcpu ba6950e065 target/alpha: Use env_cpu, env_archcpu de1af44772 cpu: Introduce env_archcpu 4b9ceefc2d cpu: Replace ENV_GET_CPU with env_cpu faf5d63b1f cpu: Define ArchCPU d8f35b54ce cpu: Define CPUArchState with typedef 78f0658f92 tcg: Create struct CPUTLB 9c7f566b92 tcg: Split out target/arch/cpu-param.h 69a619e5c4 tcg: Fold CPUTLBWindow into CPUTLBDesc === OUTPUT BEGIN === 1/39 Checking commit 69a619e5c449 (tcg: Fold CPUTLBWindow into CPUTLBDesc) 2/39 Checking commit 9c7f566b9239 (tcg: Split out target/arch/cpu-param.h) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #57: new file mode 100644 total: 0 errors, 1 warnings, 1290 lines checked Patch 2/39 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/39 Checking commit 78f0658f9271 (tcg: Create struct CPUTLB) 4/39 Checking commit d8f35b54ce58 (cpu: Define CPUArchState with typedef) 5/39 Checking commit faf5d63b1f56 (cpu: Define ArchCPU) 6/39 Checking commit 4b9ceefc2d7b (cpu: Replace ENV_GET_CPU with env_cpu) 7/39 Checking commit de1af447722b (cpu: Introduce env_archcpu) 8/39 Checking commit ba6950e06568 (target/alpha: Use env_cpu, env_archcpu) 9/39 Checking commit 07655a940098 (target/arm: Use env_cpu, env_archcpu) 10/39 Checking commit c84257154c78 (target/cris: Reindent mmu.c) 11/39 Checking commit 10ae9394cfc0 (target/cris: Reindent op_helper.c) 12/39 Checking commit d54ea138a2e2 (target/cris: Use env_cpu, env_archcpu) 13/39 Checking commit b86f02848e2b (target/hppa: Use env_cpu, env_archcpu) 14/39 Checking commit 81e38e0ad80e (target/i386: Use env_cpu, env_archcpu) 15/39 Checking commit 0e6090a49a29 (target/lm32: Use env_cpu, env_archcpu) 16/39 Checking commit c6259dfc15bf (target/m68k: Use env_cpu) 17/39 Checking commit e9df418daec8 (target/microblaze: Use env_cpu, env_archcpu) 18/39 Checking commit 83010ca82dd9 (target/mips: Use env_cpu, env_archcpu) 19/39 Checking commit efb1f9fc5fde (target/moxie: Use env_cpu, env_archcpu) 20/39 Checking commit b7d6b5a9f3cb (target/nios2: Use env_cpu, env_archcpu) 21/39 Checking commit 5169c4323929 (target/openrisc: Use env_cpu, env_archcpu) 22/39 Checking commit bc5af03f86cc (target/ppc: Use env_cpu, env_archcpu) 23/39 Checking commit 1d8cb96d06e1 (target/riscv: Use env_cpu, env_archcpu) 24/39 Checking commit ef5a6cdf1928 (target/s390x: Use env_cpu, env_archcpu) 25/39 Checking commit 60421aa3ea7e (target/sh4: Use env_cpu, env_archcpu) 26/39 Checking commit 0657035fcfd2 (target/sparc: Use env_cpu, env_archcpu) 27/39 Checking commit 69c740b73e22 (target/tilegx: Use env_cpu) 28/39 Checking commit b2f0db19026f (target/tricore: Use env_cpu) 29/39 Checking commit 1a04031ecf68 (target/unicore32: Use env_cpu, env_archcpu) 30/39 Checking commit 654b7cd617d8 (target/xtensa: Use env_cpu, env_archcpu) 31/39 Checking commit c07ad1f7547c (cpu: Move ENV_OFFSET to exec/gen-icount.h) 32/39 Checking commit 873820397469 (cpu: Introduce cpu_set_cpustate_pointers) 33/39 Checking commit 5d88cb4c7400 (cpu: Introduce CPUNegativeOffsetState) 34/39 Checking commit 592f9cd7bedf (cpu: Move icount_decr to CPUNegativeOffsetState) ERROR: return is not a function, parentheses are not required #193: FILE: cpus.c:242: + return (cpu->icount_budget - total: 1 errors, 0 warnings, 326 lines checked Patch 34/39 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 35/39 Checking commit a4fac0a5bbd0 (cpu: Move the softmmu tlb to CPUNegativeOffsetState) 36/39 Checking commit 900e66f512dc (cpu: Remove CPU_COMMON) 37/39 Checking commit be59611fe106 (tcg/aarch64: Use LDP to load tlb mask+table) 38/39 Checking commit b4d1d7bc09ca (tcg/arm: Use LDRD to load tlb mask+table) 39/39 Checking commit f8067abe5e3d (tcg/arm: Remove mostly unreachable tlb special case) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190610020218.9228-1-richard.henderson@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190610020218.9228-1-richard.henderson@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState Type: series Message-id: 20190610020218.9228-1-richard.henderson@linaro.org === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === From https://github.com/patchew-project/qemu t [tag update] patchew/20190610020218.9228-1-richard.henderson@linaro.org -> patchew/20190610020218.9228-1-richard.henderson@linaro.org Switched to a new branch 'test' 4b2d8c1852 tcg/arm: Remove mostly unreachable tlb special case 9ecc19856b tcg/arm: Use LDRD to load tlb mask+table 0a1acd1819 tcg/aarch64: Use LDP to load tlb mask+table 6abcfb2558 cpu: Remove CPU_COMMON 21a4bf85d4 cpu: Move the softmmu tlb to CPUNegativeOffsetState 021b2afde4 cpu: Move icount_decr to CPUNegativeOffsetState d0c256020b cpu: Introduce CPUNegativeOffsetState 4c80796547 cpu: Introduce cpu_set_cpustate_pointers 0fcf981cc1 cpu: Move ENV_OFFSET to exec/gen-icount.h 17cfb5d985 target/xtensa: Use env_cpu, env_archcpu 7ee3bc9bd1 target/unicore32: Use env_cpu, env_archcpu a301882a16 target/tricore: Use env_cpu d6ef28fa1b target/tilegx: Use env_cpu 5edf437d93 target/sparc: Use env_cpu, env_archcpu 538159664b target/sh4: Use env_cpu, env_archcpu ad29065402 target/s390x: Use env_cpu, env_archcpu cb71790e74 target/riscv: Use env_cpu, env_archcpu 6d7d100ed9 target/ppc: Use env_cpu, env_archcpu 05e58e0d8a target/openrisc: Use env_cpu, env_archcpu 2519b0c65a target/nios2: Use env_cpu, env_archcpu 112e818bbf target/moxie: Use env_cpu, env_archcpu 226eddd70b target/mips: Use env_cpu, env_archcpu 842cea8308 target/microblaze: Use env_cpu, env_archcpu 81cfd37e1d target/m68k: Use env_cpu 2fc6727a54 target/lm32: Use env_cpu, env_archcpu b20070a6ae target/i386: Use env_cpu, env_archcpu 2bc3043044 target/hppa: Use env_cpu, env_archcpu 650c41d2c8 target/cris: Use env_cpu, env_archcpu 9f08ae13f5 target/cris: Reindent op_helper.c 1e27218635 target/cris: Reindent mmu.c 2b235e47e0 target/arm: Use env_cpu, env_archcpu d433803411 target/alpha: Use env_cpu, env_archcpu a91011c10f cpu: Introduce env_archcpu 6d78f2fc03 cpu: Replace ENV_GET_CPU with env_cpu 83019014e3 cpu: Define ArchCPU 4c25215e81 cpu: Define CPUArchState with typedef 6f012104e2 tcg: Create struct CPUTLB 4af2bea36a tcg: Split out target/arch/cpu-param.h 65f7a0658b tcg: Fold CPUTLBWindow into CPUTLBDesc === OUTPUT BEGIN === 1/39 Checking commit 65f7a0658b81 (tcg: Fold CPUTLBWindow into CPUTLBDesc) 2/39 Checking commit 4af2bea36ac9 (tcg: Split out target/arch/cpu-param.h) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #57: new file mode 100644 total: 0 errors, 1 warnings, 1290 lines checked Patch 2/39 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/39 Checking commit 6f012104e214 (tcg: Create struct CPUTLB) 4/39 Checking commit 4c25215e81ff (cpu: Define CPUArchState with typedef) 5/39 Checking commit 83019014e305 (cpu: Define ArchCPU) 6/39 Checking commit 6d78f2fc03f0 (cpu: Replace ENV_GET_CPU with env_cpu) 7/39 Checking commit a91011c10f10 (cpu: Introduce env_archcpu) 8/39 Checking commit d4338034117c (target/alpha: Use env_cpu, env_archcpu) 9/39 Checking commit 2b235e47e090 (target/arm: Use env_cpu, env_archcpu) 10/39 Checking commit 1e27218635a6 (target/cris: Reindent mmu.c) 11/39 Checking commit 9f08ae13f592 (target/cris: Reindent op_helper.c) 12/39 Checking commit 650c41d2c8ff (target/cris: Use env_cpu, env_archcpu) 13/39 Checking commit 2bc3043044e1 (target/hppa: Use env_cpu, env_archcpu) 14/39 Checking commit b20070a6ae29 (target/i386: Use env_cpu, env_archcpu) 15/39 Checking commit 2fc6727a54eb (target/lm32: Use env_cpu, env_archcpu) 16/39 Checking commit 81cfd37e1d7e (target/m68k: Use env_cpu) 17/39 Checking commit 842cea830816 (target/microblaze: Use env_cpu, env_archcpu) 18/39 Checking commit 226eddd70bc3 (target/mips: Use env_cpu, env_archcpu) 19/39 Checking commit 112e818bbf61 (target/moxie: Use env_cpu, env_archcpu) 20/39 Checking commit 2519b0c65a54 (target/nios2: Use env_cpu, env_archcpu) 21/39 Checking commit 05e58e0d8aa3 (target/openrisc: Use env_cpu, env_archcpu) 22/39 Checking commit 6d7d100ed9ad (target/ppc: Use env_cpu, env_archcpu) 23/39 Checking commit cb71790e7474 (target/riscv: Use env_cpu, env_archcpu) 24/39 Checking commit ad29065402f2 (target/s390x: Use env_cpu, env_archcpu) 25/39 Checking commit 538159664b94 (target/sh4: Use env_cpu, env_archcpu) 26/39 Checking commit 5edf437d93d3 (target/sparc: Use env_cpu, env_archcpu) 27/39 Checking commit d6ef28fa1b69 (target/tilegx: Use env_cpu) 28/39 Checking commit a301882a162f (target/tricore: Use env_cpu) 29/39 Checking commit 7ee3bc9bd117 (target/unicore32: Use env_cpu, env_archcpu) 30/39 Checking commit 17cfb5d98571 (target/xtensa: Use env_cpu, env_archcpu) 31/39 Checking commit 0fcf981cc166 (cpu: Move ENV_OFFSET to exec/gen-icount.h) 32/39 Checking commit 4c8079654779 (cpu: Introduce cpu_set_cpustate_pointers) 33/39 Checking commit d0c256020b90 (cpu: Introduce CPUNegativeOffsetState) 34/39 Checking commit 021b2afde43d (cpu: Move icount_decr to CPUNegativeOffsetState) ERROR: return is not a function, parentheses are not required #193: FILE: cpus.c:242: + return (cpu->icount_budget - total: 1 errors, 0 warnings, 326 lines checked Patch 34/39 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 35/39 Checking commit 21a4bf85d478 (cpu: Move the softmmu tlb to CPUNegativeOffsetState) 36/39 Checking commit 6abcfb2558b4 (cpu: Remove CPU_COMMON) 37/39 Checking commit 0a1acd1819a7 (tcg/aarch64: Use LDP to load tlb mask+table) 38/39 Checking commit 9ecc19856bc8 (tcg/arm: Use LDRD to load tlb mask+table) 39/39 Checking commit 4b2d8c1852c9 (tcg/arm: Remove mostly unreachable tlb special case) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190610020218.9228-1-richard.henderson@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190610020218.9228-1-richard.henderson@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20190610020218.9228-1-richard.henderson@linaro.org Subject: [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 Switched to a new branch 'test' 14c3ef7 tcg/arm: Remove mostly unreachable tlb special case 4b69ec8 tcg/arm: Use LDRD to load tlb mask+table c9f7425 tcg/aarch64: Use LDP to load tlb mask+table a893d89 cpu: Remove CPU_COMMON 8f9c8d6 cpu: Move the softmmu tlb to CPUNegativeOffsetState 2551086 cpu: Move icount_decr to CPUNegativeOffsetState 0a1137b cpu: Introduce CPUNegativeOffsetState b64e470 cpu: Introduce cpu_set_cpustate_pointers 2a23caa cpu: Move ENV_OFFSET to exec/gen-icount.h e08735f target/xtensa: Use env_cpu, env_archcpu 645c46c target/unicore32: Use env_cpu, env_archcpu 6709e7d target/tricore: Use env_cpu 976835d target/tilegx: Use env_cpu a711dbf target/sparc: Use env_cpu, env_archcpu 569f3d9 target/sh4: Use env_cpu, env_archcpu 3c61f09 target/s390x: Use env_cpu, env_archcpu 9313c73 target/riscv: Use env_cpu, env_archcpu 173e48f target/ppc: Use env_cpu, env_archcpu f84d7f8 target/openrisc: Use env_cpu, env_archcpu 393a70d target/nios2: Use env_cpu, env_archcpu c695005 target/moxie: Use env_cpu, env_archcpu a4e8def target/mips: Use env_cpu, env_archcpu a6515fe target/microblaze: Use env_cpu, env_archcpu 63a9a1c target/m68k: Use env_cpu 3b316f1 target/lm32: Use env_cpu, env_archcpu 82efaa6 target/i386: Use env_cpu, env_archcpu 11c992f target/hppa: Use env_cpu, env_archcpu de08093 target/cris: Use env_cpu, env_archcpu a525f0d target/cris: Reindent op_helper.c 065f3b4 target/cris: Reindent mmu.c 6302f94 target/arm: Use env_cpu, env_archcpu 1f3027f target/alpha: Use env_cpu, env_archcpu 00a7c19 cpu: Introduce env_archcpu b18aedf cpu: Replace ENV_GET_CPU with env_cpu cecbcff cpu: Define ArchCPU 04707fb cpu: Define CPUArchState with typedef 16c2a7d tcg: Create struct CPUTLB 8534521 tcg: Split out target/arch/cpu-param.h 449faed tcg: Fold CPUTLBWindow into CPUTLBDesc === OUTPUT BEGIN === 1/39 Checking commit 449faedd6a35 (tcg: Fold CPUTLBWindow into CPUTLBDesc) 2/39 Checking commit 8534521f7a9b (tcg: Split out target/arch/cpu-param.h) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #57: new file mode 100644 total: 0 errors, 1 warnings, 1290 lines checked Patch 2/39 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/39 Checking commit 16c2a7daf1f6 (tcg: Create struct CPUTLB) 4/39 Checking commit 04707fb05fed (cpu: Define CPUArchState with typedef) 5/39 Checking commit cecbcff952a4 (cpu: Define ArchCPU) 6/39 Checking commit b18aedfb528a (cpu: Replace ENV_GET_CPU with env_cpu) 7/39 Checking commit 00a7c19a4453 (cpu: Introduce env_archcpu) 8/39 Checking commit 1f3027f13062 (target/alpha: Use env_cpu, env_archcpu) 9/39 Checking commit 6302f943c509 (target/arm: Use env_cpu, env_archcpu) 10/39 Checking commit 065f3b4f397f (target/cris: Reindent mmu.c) 11/39 Checking commit a525f0d79de4 (target/cris: Reindent op_helper.c) 12/39 Checking commit de080934494e (target/cris: Use env_cpu, env_archcpu) 13/39 Checking commit 11c992f99fae (target/hppa: Use env_cpu, env_archcpu) 14/39 Checking commit 82efaa6ec56b (target/i386: Use env_cpu, env_archcpu) 15/39 Checking commit 3b316f1f2b9d (target/lm32: Use env_cpu, env_archcpu) 16/39 Checking commit 63a9a1c41275 (target/m68k: Use env_cpu) 17/39 Checking commit a6515fe51220 (target/microblaze: Use env_cpu, env_archcpu) 18/39 Checking commit a4e8def8ff09 (target/mips: Use env_cpu, env_archcpu) 19/39 Checking commit c69500532ed4 (target/moxie: Use env_cpu, env_archcpu) 20/39 Checking commit 393a70d2de3d (target/nios2: Use env_cpu, env_archcpu) 21/39 Checking commit f84d7f877212 (target/openrisc: Use env_cpu, env_archcpu) 22/39 Checking commit 173e48fee38b (target/ppc: Use env_cpu, env_archcpu) 23/39 Checking commit 9313c73df98a (target/riscv: Use env_cpu, env_archcpu) 24/39 Checking commit 3c61f09fe8e8 (target/s390x: Use env_cpu, env_archcpu) 25/39 Checking commit 569f3d9b29ea (target/sh4: Use env_cpu, env_archcpu) 26/39 Checking commit a711dbf6ec0a (target/sparc: Use env_cpu, env_archcpu) 27/39 Checking commit 976835d19780 (target/tilegx: Use env_cpu) 28/39 Checking commit 6709e7d659a4 (target/tricore: Use env_cpu) 29/39 Checking commit 645c46c65bbf (target/unicore32: Use env_cpu, env_archcpu) 30/39 Checking commit e08735f0d8c4 (target/xtensa: Use env_cpu, env_archcpu) 31/39 Checking commit 2a23caa546af (cpu: Move ENV_OFFSET to exec/gen-icount.h) 32/39 Checking commit b64e470fef4c (cpu: Introduce cpu_set_cpustate_pointers) 33/39 Checking commit 0a1137b8f86b (cpu: Introduce CPUNegativeOffsetState) 34/39 Checking commit 255108651fcc (cpu: Move icount_decr to CPUNegativeOffsetState) ERROR: return is not a function, parentheses are not required #193: FILE: cpus.c:242: + return (cpu->icount_budget - total: 1 errors, 0 warnings, 326 lines checked Patch 34/39 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 35/39 Checking commit 8f9c8d67498e (cpu: Move the softmmu tlb to CPUNegativeOffsetState) 36/39 Checking commit a893d896a965 (cpu: Remove CPU_COMMON) 37/39 Checking commit c9f74258be93 (tcg/aarch64: Use LDP to load tlb mask+table) 38/39 Checking commit 4b69ec8743d9 (tcg/arm: Use LDRD to load tlb mask+table) 39/39 Checking commit 14c3ef71e449 (tcg/arm: Remove mostly unreachable tlb special case) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190610020218.9228-1-richard.henderson@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
On Mon, 10 Jun 2019 at 03:02, Richard Henderson <richard.henderson@linaro.org> wrote: > > The following changes since commit 185b7ccc11354cbd69b6d53bf8d831dd964f6c88: > > Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190607-2' into staging (2019-06-07 15:24:13 +0100) > > are available in the Git repository at: > > https://github.com/rth7680/qemu.git tags/pull-tcg-20190609 > > for you to fetch changes up to e20774aed18cc5e0113e6a6c502ece2fc1c41931: > > tcg/arm: Remove mostly unreachable tlb special case (2019-06-09 18:55:23 -0700) > > ---------------------------------------------------------------- > Move softmmu tlb into CPUNegativeOffsetState > > ---------------------------------------------------------------- Hi; this failed to build on OpenBSD: /tmp/qemu-test.RzUFLe/bsd-user/main.c: In function 'cpu_loop': /tmp/qemu-test.RzUFLe/bsd-user/main.c:143:28: error: 'cpu' undeclared (first use in this function) CPUState *cs = env_cpu(cpu); ^ /tmp/qemu-test.RzUFLe/bsd-user/main.c:143:28: note: each undeclared identifier is reported only once for each function it appears in (freebsd and netbsd were ok) thanks -- PMM
The following changes since commit 185b7ccc11354cbd69b6d53bf8d831dd964f6c88: Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190607-2' into staging (2019-06-07 15:24:13 +0100) are available in the Git repository at: https://github.com/rth7680/qemu.git tags/pull-tcg-20190609 for you to fetch changes up to e20774aed18cc5e0113e6a6c502ece2fc1c41931: tcg/arm: Remove mostly unreachable tlb special case (2019-06-09 18:55:23 -0700) ---------------------------------------------------------------- Move softmmu tlb into CPUNegativeOffsetState ---------------------------------------------------------------- Richard Henderson (39): tcg: Fold CPUTLBWindow into CPUTLBDesc tcg: Split out target/arch/cpu-param.h tcg: Create struct CPUTLB cpu: Define CPUArchState with typedef cpu: Define ArchCPU cpu: Replace ENV_GET_CPU with env_cpu cpu: Introduce env_archcpu target/alpha: Use env_cpu, env_archcpu target/arm: Use env_cpu, env_archcpu target/cris: Reindent mmu.c target/cris: Reindent op_helper.c target/cris: Use env_cpu, env_archcpu target/hppa: Use env_cpu, env_archcpu target/i386: Use env_cpu, env_archcpu target/lm32: Use env_cpu, env_archcpu target/m68k: Use env_cpu target/microblaze: Use env_cpu, env_archcpu target/mips: Use env_cpu, env_archcpu target/moxie: Use env_cpu, env_archcpu target/nios2: Use env_cpu, env_archcpu target/openrisc: Use env_cpu, env_archcpu target/ppc: Use env_cpu, env_archcpu target/riscv: Use env_cpu, env_archcpu target/s390x: Use env_cpu, env_archcpu target/sh4: Use env_cpu, env_archcpu target/sparc: Use env_cpu, env_archcpu target/tilegx: Use env_cpu target/tricore: Use env_cpu target/unicore32: Use env_cpu, env_archcpu target/xtensa: Use env_cpu, env_archcpu cpu: Move ENV_OFFSET to exec/gen-icount.h cpu: Introduce cpu_set_cpustate_pointers cpu: Introduce CPUNegativeOffsetState cpu: Move icount_decr to CPUNegativeOffsetState cpu: Move the softmmu tlb to CPUNegativeOffsetState cpu: Remove CPU_COMMON tcg/aarch64: Use LDP to load tlb mask+table tcg/arm: Use LDRD to load tlb mask+table tcg/arm: Remove mostly unreachable tlb special case accel/tcg/atomic_template.h | 8 +- include/exec/cpu-all.h | 69 +++ include/exec/cpu-defs.h | 111 ++-- include/exec/cpu_ldst.h | 6 +- include/exec/cpu_ldst_template.h | 6 +- include/exec/cpu_ldst_useronly_template.h | 6 +- include/exec/gen-icount.h | 14 +- include/exec/softmmu-semi.h | 16 +- include/qom/cpu.h | 40 +- linux-user/cpu_loop-common.h | 2 +- linux-user/m68k/target_cpu.h | 2 +- target/alpha/cpu-param.h | 31 ++ target/alpha/cpu.h | 40 +- target/arm/cpu-param.h | 34 ++ target/arm/cpu.h | 52 +- target/cris/cpu-param.h | 17 + target/cris/cpu.h | 25 +- target/hppa/cpu-param.h | 34 ++ target/hppa/cpu.h | 38 +- target/i386/cpu-param.h | 28 + target/i386/cpu.h | 40 +- target/lm32/cpu-param.h | 17 + target/lm32/cpu.h | 25 +- target/m68k/cpu-param.h | 22 + target/m68k/cpu.h | 28 +- target/microblaze/cpu-param.h | 18 + target/microblaze/cpu.h | 63 +-- target/mips/cpu-param.h | 29 ++ target/mips/cpu.h | 21 +- target/mips/mips-defs.h | 15 - target/moxie/cpu-param.h | 17 + target/moxie/cpu.h | 29 +- target/nios2/cpu-param.h | 21 + target/nios2/cpu.h | 33 +- target/openrisc/cpu-param.h | 17 + target/openrisc/cpu.h | 31 +- target/ppc/cpu-param.h | 37 ++ target/ppc/cpu.h | 61 +-- target/ppc/helper_regs.h | 4 +- target/riscv/cpu-param.h | 23 + target/riscv/cpu.h | 34 +- target/s390x/cpu-param.h | 17 + target/s390x/cpu.h | 31 +- target/sh4/cpu-param.h | 21 + target/sh4/cpu.h | 30 +- target/sparc/cpu-param.h | 28 + target/sparc/cpu.h | 36 +- target/tilegx/cpu-param.h | 17 + target/tilegx/cpu.h | 23 +- target/tricore/cpu-param.h | 17 + target/tricore/cpu.h | 22 +- target/tricore/tricore-defs.h | 5 - target/unicore32/cpu-param.h | 17 + target/unicore32/cpu.h | 24 +- target/xtensa/cpu-param.h | 21 + target/xtensa/cpu.h | 40 +- accel/tcg/cpu-exec.c | 23 +- accel/tcg/cputlb.c | 226 ++++---- accel/tcg/tcg-all.c | 6 +- accel/tcg/tcg-runtime.c | 4 +- accel/tcg/translate-all.c | 10 +- accel/tcg/user-exec.c | 2 +- bsd-user/main.c | 5 +- bsd-user/syscall.c | 6 +- cpus.c | 9 +- hw/i386/kvmvapic.c | 4 +- hw/i386/pc.c | 2 +- hw/intc/mips_gic.c | 2 +- hw/mips/mips_int.c | 2 +- hw/nios2/cpu_pic.c | 5 +- hw/ppc/ppc.c | 18 +- hw/ppc/ppc405_uc.c | 2 +- hw/ppc/ppc_booke.c | 4 +- hw/semihosting/console.c | 2 +- hw/sparc/leon3.c | 4 +- hw/sparc/sun4m.c | 4 +- hw/sparc64/sparc64.c | 2 +- hw/unicore32/puv3.c | 2 +- hw/xtensa/pic_cpu.c | 2 +- linux-user/aarch64/cpu_loop.c | 6 +- linux-user/aarch64/signal.c | 4 +- linux-user/alpha/cpu_loop.c | 2 +- linux-user/arm/cpu_loop.c | 4 +- linux-user/cris/cpu_loop.c | 4 +- linux-user/elfload.c | 6 +- linux-user/hppa/cpu_loop.c | 2 +- linux-user/i386/cpu_loop.c | 2 +- linux-user/i386/signal.c | 2 +- linux-user/m68k-sim.c | 3 +- linux-user/m68k/cpu_loop.c | 4 +- linux-user/main.c | 2 +- linux-user/microblaze/cpu_loop.c | 2 +- linux-user/mips/cpu_loop.c | 4 +- linux-user/nios2/cpu_loop.c | 2 +- linux-user/openrisc/cpu_loop.c | 2 +- linux-user/ppc/cpu_loop.c | 2 +- linux-user/riscv/cpu_loop.c | 4 +- linux-user/s390x/cpu_loop.c | 2 +- linux-user/sh4/cpu_loop.c | 2 +- linux-user/signal.c | 8 +- linux-user/sparc/cpu_loop.c | 2 +- linux-user/syscall.c | 26 +- linux-user/tilegx/cpu_loop.c | 2 +- linux-user/uname.c | 2 +- linux-user/vm86.c | 18 +- linux-user/xtensa/cpu_loop.c | 2 +- qom/cpu.c | 4 +- target/alpha/cpu.c | 3 +- target/alpha/helper.c | 8 +- target/alpha/sys_helper.c | 8 +- target/arm/arm-semi.c | 4 +- target/arm/cpu.c | 3 +- target/arm/cpu64.c | 2 +- target/arm/helper-a64.c | 4 +- target/arm/helper.c | 162 +++--- target/arm/op_helper.c | 21 +- target/arm/translate-a64.c | 4 +- target/arm/translate.c | 2 +- target/arm/vfp_helper.c | 2 +- target/cris/cpu.c | 3 +- target/cris/mmu.c | 482 +++++++++-------- target/cris/op_helper.c | 827 +++++++++++++++--------------- target/cris/translate.c | 2 +- target/hppa/cpu.c | 2 +- target/hppa/helper.c | 3 +- target/hppa/int_helper.c | 4 +- target/hppa/mem_helper.c | 10 +- target/hppa/op_helper.c | 10 +- target/i386/bpt_helper.c | 4 +- target/i386/cpu.c | 7 +- target/i386/excp_helper.c | 2 +- target/i386/fpu_helper.c | 2 +- target/i386/hax-all.c | 6 +- target/i386/helper.c | 16 +- target/i386/hvf/x86_decode.c | 22 +- target/i386/hvf/x86_emu.c | 60 ++- target/i386/mem_helper.c | 4 +- target/i386/misc_helper.c | 24 +- target/i386/seg_helper.c | 14 +- target/i386/smm_helper.c | 4 +- target/i386/svm_helper.c | 22 +- target/lm32/cpu.c | 3 +- target/lm32/helper.c | 19 +- target/lm32/op_helper.c | 6 +- target/lm32/translate.c | 2 +- target/m68k/cpu.c | 4 +- target/m68k/helper.c | 33 +- target/m68k/m68k-semi.c | 4 +- target/m68k/op_helper.c | 14 +- target/m68k/translate.c | 4 +- target/microblaze/cpu.c | 3 +- target/microblaze/mmu.c | 5 +- target/microblaze/op_helper.c | 2 +- target/microblaze/translate.c | 2 +- target/mips/cpu.c | 3 +- target/mips/helper.c | 15 +- target/mips/op_helper.c | 25 +- target/mips/translate.c | 3 +- target/mips/translate_init.inc.c | 4 +- target/moxie/cpu.c | 3 +- target/moxie/helper.c | 4 +- target/moxie/translate.c | 2 +- target/nios2/cpu.c | 6 +- target/nios2/mmu.c | 14 +- target/nios2/op_helper.c | 2 +- target/openrisc/cpu.c | 3 +- target/openrisc/exception_helper.c | 5 +- target/openrisc/sys_helper.c | 8 +- target/ppc/excp_helper.c | 14 +- target/ppc/fpu_helper.c | 14 +- target/ppc/kvm.c | 5 +- target/ppc/misc_helper.c | 22 +- target/ppc/mmu-hash64.c | 14 +- target/ppc/mmu_helper.c | 117 ++--- target/ppc/translate_init.inc.c | 88 ++-- target/riscv/cpu.c | 3 +- target/riscv/cpu_helper.c | 10 +- target/riscv/csr.c | 12 +- target/riscv/op_helper.c | 7 +- target/s390x/cc_helper.c | 5 +- target/s390x/cpu.c | 9 +- target/s390x/diag.c | 2 +- target/s390x/excp_helper.c | 8 +- target/s390x/fpu_helper.c | 4 +- target/s390x/gdbstub.c | 24 +- target/s390x/helper.c | 7 +- target/s390x/int_helper.c | 3 +- target/s390x/interrupt.c | 6 +- target/s390x/mem_helper.c | 30 +- target/s390x/misc_helper.c | 50 +- target/s390x/mmu_helper.c | 8 +- target/s390x/sigp.c | 4 +- target/sh4/cpu.c | 3 +- target/sh4/helper.c | 26 +- target/sh4/op_helper.c | 11 +- target/sparc/cpu.c | 3 +- target/sparc/fop_helper.c | 2 +- target/sparc/helper.c | 8 +- target/sparc/ldst_helper.c | 33 +- target/sparc/mmu_helper.c | 10 +- target/tilegx/cpu.c | 4 +- target/tilegx/helper.c | 2 +- target/tricore/cpu.c | 4 +- target/tricore/op_helper.c | 2 +- target/unicore32/cpu.c | 3 +- target/unicore32/helper.c | 4 +- target/unicore32/op_helper.c | 2 +- target/unicore32/softmmu.c | 11 +- target/unicore32/translate.c | 26 +- target/unicore32/ucf64_helper.c | 2 +- target/xtensa/cpu.c | 3 +- target/xtensa/dbg_helper.c | 4 +- target/xtensa/exc_helper.c | 9 +- target/xtensa/helper.c | 2 +- target/xtensa/mmu_helper.c | 17 +- target/xtensa/xtensa-semi.c | 2 +- tcg/aarch64/tcg-target.inc.c | 40 +- tcg/arm/tcg-target.inc.c | 149 +++--- tcg/i386/tcg-target.inc.c | 6 +- tcg/mips/tcg-target.inc.c | 45 +- tcg/ppc/tcg-target.inc.c | 32 +- tcg/riscv/tcg-target.inc.c | 37 +- tcg/s390/tcg-target.inc.c | 13 +- tcg/sparc/tcg-target.inc.c | 40 +- docs/devel/tracing.txt | 4 +- scripts/tracetool/format/tcg_helper_c.py | 2 +- 226 files changed, 2389 insertions(+), 2573 deletions(-) create mode 100644 target/alpha/cpu-param.h create mode 100644 target/arm/cpu-param.h create mode 100644 target/cris/cpu-param.h create mode 100644 target/hppa/cpu-param.h create mode 100644 target/i386/cpu-param.h create mode 100644 target/lm32/cpu-param.h create mode 100644 target/m68k/cpu-param.h create mode 100644 target/microblaze/cpu-param.h create mode 100644 target/mips/cpu-param.h create mode 100644 target/moxie/cpu-param.h create mode 100644 target/nios2/cpu-param.h create mode 100644 target/openrisc/cpu-param.h create mode 100644 target/ppc/cpu-param.h create mode 100644 target/riscv/cpu-param.h create mode 100644 target/s390x/cpu-param.h create mode 100644 target/sh4/cpu-param.h create mode 100644 target/sparc/cpu-param.h create mode 100644 target/tilegx/cpu-param.h create mode 100644 target/tricore/cpu-param.h create mode 100644 target/unicore32/cpu-param.h create mode 100644 target/xtensa/cpu-param.h