mbox series

[v16,00/23] Add RX architecture

Message ID 20190531134315.4109-1-richard.henderson@linaro.org
Headers show
Series Add RX architecture | expand

Message

Richard Henderson May 31, 2019, 1:42 p.m. UTC
The v14 patch set, from which I had prepared the pull request,
contained errors within make check-qtest-rx.  I have added 4
new patches, 12 through 15, to address those failures.  These
are placed before the enablement patch 16 so that there is no
point at which these tests both run and fail.

I have not tried to extract the changes that Sato-san made in
his v15 patch set and folded in to previous patches.

I have appended the disassembler patches that have been reviewed.

Hopefully this is the version that can be merged, so that normal
development can proceed from there.


r~


Richard Henderson (11):
  target/rx: Convert to CPUClass::tlb_fill
  target/rx: Add RX to SysEmuTarget
  target/rx: Fix cpu types and names
  tests: Add rx to machine-none-test.c
  hw/rx: Honor -accel qtest
  target/rx: Disassemble rx_index_addr into a string
  target/rx: Replace operand with prt_ldmi in disassembler
  target/rx: Use prt_ldmi for XCHG_mr disassembly
  target/rx: Emit all disassembly in one prt()
  target/rx: Collect all bytes during disassembly
  target/rx: Dump bytes for each insn during disassembly

Yoshinori Sato (12):
  target/rx: TCG translation
  target/rx: TCG helper
  target/rx: CPU definition
  target/rx: RX disassembler
  hw/intc: RX62N interrupt controller (ICUa)
  hw/timer: RX62N internal timer modules
  hw/char: RX62N serial communication interface (SCI)
  hw/rx: RX Target hardware definition
  qemu/bitops.h: Add extract8 and extract16
  hw/registerfields.h: Add 8bit and 16bit register macros
  Add rx-softmmu
  MAINTAINERS: Add RX

 include/disas/dis-asm.h        |    5 +
 include/hw/char/renesas_sci.h  |   45 +
 include/hw/intc/rx_icu.h       |   56 +
 include/hw/registerfields.h    |   32 +-
 include/hw/rx/rx.h             |    7 +
 include/hw/rx/rx62n.h          |   94 ++
 include/hw/timer/renesas_cmt.h |   38 +
 include/hw/timer/renesas_tmr.h |   53 +
 include/qemu/bitops.h          |   38 +
 include/sysemu/arch_init.h     |    1 +
 target/rx/cpu.h                |  227 +++
 target/rx/helper.h             |   31 +
 arch_init.c                    |    2 +
 hw/char/renesas_sci.c          |  340 +++++
 hw/intc/rx_icu.c               |  376 +++++
 hw/rx/rx-virt.c                |  105 ++
 hw/rx/rx62n.c                  |  246 ++++
 hw/timer/renesas_cmt.c         |  275 ++++
 hw/timer/renesas_tmr.c         |  455 ++++++
 target/rx/cpu.c                |  245 ++++
 target/rx/disas.c              | 1446 +++++++++++++++++++
 target/rx/gdbstub.c            |  112 ++
 target/rx/helper.c             |  148 ++
 target/rx/monitor.c            |   38 +
 target/rx/op_helper.c          |  470 ++++++
 target/rx/translate.c          | 2432 ++++++++++++++++++++++++++++++++
 tests/machine-none-test.c      |    1 +
 MAINTAINERS                    |   19 +
 configure                      |    8 +
 default-configs/rx-softmmu.mak |    3 +
 hw/Kconfig                     |    1 +
 hw/char/Kconfig                |    3 +
 hw/char/Makefile.objs          |    1 +
 hw/intc/Kconfig                |    3 +
 hw/intc/Makefile.objs          |    1 +
 hw/rx/Kconfig                  |   14 +
 hw/rx/Makefile.objs            |    2 +
 hw/timer/Kconfig               |    6 +
 hw/timer/Makefile.objs         |    3 +
 qapi/common.json               |    3 +-
 target/rx/Makefile.objs        |   12 +
 target/rx/insns.decode         |  621 ++++++++
 42 files changed, 8016 insertions(+), 2 deletions(-)
 create mode 100644 include/hw/char/renesas_sci.h
 create mode 100644 include/hw/intc/rx_icu.h
 create mode 100644 include/hw/rx/rx.h
 create mode 100644 include/hw/rx/rx62n.h
 create mode 100644 include/hw/timer/renesas_cmt.h
 create mode 100644 include/hw/timer/renesas_tmr.h
 create mode 100644 target/rx/cpu.h
 create mode 100644 target/rx/helper.h
 create mode 100644 hw/char/renesas_sci.c
 create mode 100644 hw/intc/rx_icu.c
 create mode 100644 hw/rx/rx-virt.c
 create mode 100644 hw/rx/rx62n.c
 create mode 100644 hw/timer/renesas_cmt.c
 create mode 100644 hw/timer/renesas_tmr.c
 create mode 100644 target/rx/cpu.c
 create mode 100644 target/rx/disas.c
 create mode 100644 target/rx/gdbstub.c
 create mode 100644 target/rx/helper.c
 create mode 100644 target/rx/monitor.c
 create mode 100644 target/rx/op_helper.c
 create mode 100644 target/rx/translate.c
 create mode 100644 default-configs/rx-softmmu.mak
 create mode 100644 hw/rx/Kconfig
 create mode 100644 hw/rx/Makefile.objs
 create mode 100644 target/rx/Makefile.objs
 create mode 100644 target/rx/insns.decode

-- 
2.17.1

Comments

no-reply@patchew.org May 31, 2019, 2:12 p.m. UTC | #1
Patchew URL: https://patchew.org/QEMU/20190531134315.4109-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [Qemu-devel] [PATCH v16 00/23] Add RX architecture
Type: series
Message-id: 20190531134315.4109-1-richard.henderson@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 * [new tag]               patchew/20190531134315.4109-1-richard.henderson@linaro.org -> patchew/20190531134315.4109-1-richard.henderson@linaro.org
Switched to a new branch 'test'
ffcea440b8 target/rx: Dump bytes for each insn during disassembly
d553ce4a08 target/rx: Collect all bytes during disassembly
ee094326fe target/rx: Emit all disassembly in one prt()
188cad567c target/rx: Use prt_ldmi for XCHG_mr disassembly
c9351a22c2 target/rx: Replace operand with prt_ldmi in disassembler
5ecb1793e3 target/rx: Disassemble rx_index_addr into a string
ff68bdc506 MAINTAINERS: Add RX
a4f4593c77 Add rx-softmmu
c986db6ef8 hw/rx: Honor -accel qtest
1ea74258fe tests: Add rx to machine-none-test.c
4c89efca3b target/rx: Fix cpu types and names
603269c1a1 target/rx: Add RX to SysEmuTarget
02b36cecf7 target/rx: Convert to CPUClass::tlb_fill
41c99c3cc0 hw/registerfields.h: Add 8bit and 16bit register macros
31bb5f5bb7 qemu/bitops.h: Add extract8 and extract16
90429ffbcc hw/rx: RX Target hardware definition
f1fc365f6c hw/char: RX62N serial communication interface (SCI)
5627ac04aa hw/timer: RX62N internal timer modules
97dafd2299 hw/intc: RX62N interrupt controller (ICUa)
662ab67e6d target/rx: RX disassembler
5e8790e8c5 target/rx: CPU definition
5113aeed41 target/rx: TCG helper
6aff3f4cc2 target/rx: TCG translation

=== OUTPUT BEGIN ===
1/23 Checking commit 6aff3f4cc28b (target/rx: TCG translation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#19: 
new file mode 100644

total: 0 errors, 1 warnings, 3065 lines checked

Patch 1/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
2/23 Checking commit 5113aeed4137 (target/rx: TCG helper)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#14: 
new file mode 100644

total: 0 errors, 1 warnings, 660 lines checked

Patch 2/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/23 Checking commit 5e8790e8c563 (target/rx: CPU definition)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#14: 
new file mode 100644

total: 0 errors, 1 warnings, 599 lines checked

Patch 3/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/23 Checking commit 662ab67e6d90 (target/rx: RX disassembler)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 1497 lines checked

Patch 4/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/23 Checking commit 97dafd2299da (hw/intc: RX62N interrupt controller (ICUa))
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 442 lines checked

Patch 5/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/23 Checking commit 5627ac04aa17 (hw/timer: RX62N internal timer modules)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#49: 
new file mode 100644

total: 0 errors, 1 warnings, 839 lines checked

Patch 6/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/23 Checking commit f1fc365f6ce9 (hw/char: RX62N serial communication interface (SCI))
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

total: 0 errors, 1 warnings, 398 lines checked

Patch 7/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
8/23 Checking commit 90429ffbcc0e (hw/rx: RX Target hardware definition)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#18: 
new file mode 100644

total: 0 errors, 1 warnings, 460 lines checked

Patch 8/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/23 Checking commit 31bb5f5bb70f (qemu/bitops.h: Add extract8 and extract16)
10/23 Checking commit 41c99c3cc087 (hw/registerfields.h: Add 8bit and 16bit register macros)
Use of uninitialized value within @rawlines in concatenation (.) or string at ./scripts/checkpatch.pl line 2466.
ERROR: Macros with multiple statements should be enclosed in a do - while loop
#25: FILE: include/hw/registerfields.h:25:
+#define REG8(reg, addr)                                                  \
+    enum { A_ ## reg = (addr) };                                          \
+    enum { R_ ## reg = (addr) };

ERROR: Macros with multiple statements should be enclosed in a do - while loop
#29: FILE: include/hw/registerfields.h:29:
+#define REG16(reg, addr)                                                  \
+    enum { A_ ## reg = (addr) };                                          \
+    enum { R_ ## reg = (addr) / 2 };

total: 2 errors, 0 warnings, 56 lines checked

Patch 10/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

11/23 Checking commit 02b36cecf78a (target/rx: Convert to CPUClass::tlb_fill)
12/23 Checking commit 603269c1a130 (target/rx: Add RX to SysEmuTarget)
13/23 Checking commit 4c89efca3b19 (target/rx: Fix cpu types and names)
14/23 Checking commit 1ea74258febe (tests: Add rx to machine-none-test.c)
15/23 Checking commit c986db6ef867 (hw/rx: Honor -accel qtest)
16/23 Checking commit a4f4593c77c7 (Add rx-softmmu)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 45 lines checked

Patch 16/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/23 Checking commit ff68bdc50604 (MAINTAINERS: Add RX)
18/23 Checking commit 5ecb1793e39b (target/rx: Disassemble rx_index_addr into a string)
19/23 Checking commit c9351a22c284 (target/rx: Replace operand with prt_ldmi in disassembler)
20/23 Checking commit 188cad567c87 (target/rx: Use prt_ldmi for XCHG_mr disassembly)
21/23 Checking commit ee094326feba (target/rx: Emit all disassembly in one prt())
22/23 Checking commit d553ce4a083a (target/rx: Collect all bytes during disassembly)
23/23 Checking commit ffcea440b863 (target/rx: Dump bytes for each insn during disassembly)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190531134315.4109-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Philippe Mathieu-Daudé June 4, 2019, 5:23 a.m. UTC | #2
On 5/31/19 3:42 PM, Richard Henderson wrote:
> The v14 patch set, from which I had prepared the pull request,

> contained errors within make check-qtest-rx.  I have added 4

> new patches, 12 through 15, to address those failures.  These

> are placed before the enablement patch 16 so that there is no

> point at which these tests both run and fail.

> 

> I have not tried to extract the changes that Sato-san made in

> his v15 patch set and folded in to previous patches.

> 

> I have appended the disassembler patches that have been reviewed.

> 

> Hopefully this is the version that can be merged, so that normal

> development can proceed from there.

> 

> 

> r~

> 

> 

> Richard Henderson (11):

>   target/rx: Convert to CPUClass::tlb_fill

>   target/rx: Add RX to SysEmuTarget

>   target/rx: Fix cpu types and names

>   tests: Add rx to machine-none-test.c

>   hw/rx: Honor -accel qtest

>   target/rx: Disassemble rx_index_addr into a string

>   target/rx: Replace operand with prt_ldmi in disassembler

>   target/rx: Use prt_ldmi for XCHG_mr disassembly

>   target/rx: Emit all disassembly in one prt()

>   target/rx: Collect all bytes during disassembly

>   target/rx: Dump bytes for each insn during disassembly

> 

> Yoshinori Sato (12):

>   target/rx: TCG translation

>   target/rx: TCG helper

>   target/rx: CPU definition

>   target/rx: RX disassembler

>   hw/intc: RX62N interrupt controller (ICUa)

>   hw/timer: RX62N internal timer modules

>   hw/char: RX62N serial communication interface (SCI)

>   hw/rx: RX Target hardware definition

>   qemu/bitops.h: Add extract8 and extract16

>   hw/registerfields.h: Add 8bit and 16bit register macros

>   Add rx-softmmu

>   MAINTAINERS: Add RX


Series:
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>


You might want to include this test:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg05747.html

To run it:

$ make check-venv
$ ./tests/venv/bin/python -m avocado --show=console run -t arch:rx
tests/acceptance/boot_linux_console.py
console: U-Boot 2016.05-rc3-23705-ga1ef3c71cb-dirty (Feb 05 2019 -
21:56:06 +0900)
console: Linux version 4.19.0+ (yo-satoh@yo-satoh-debian) (gcc version
9.0.0 20181105 (experimental) (GCC)) #137 Wed Feb 20 23:20:02 JST 2019
console: Built 1 zonelists, mobility grouping on.  Total pages: 8128
console: Kernel command line:
console: Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
console: Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
console: Memory: 14648K/32768K available (871K kernel code, 95K rwdata,
140K rodata, 96K init, 175K bss, 18120K reserved, 0K cma-reserved)
console: NR_IRQS: 256
console: rx-cmt: used for periodic clock events
console: clocksource: rx-tpu: mask: 0xffffffff max_cycles: 0xffffffff,
max_idle_ns: 1274173631191 ns
console: 96.00 BogoMIPS (lpj=480000)
console: pid_max: default: 4096 minimum: 301
console: Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
console: Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
console: clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff,
max_idle_ns: 19112604462750000 ns
console: clocksource: Switched to clocksource rx-tpu
console: workingset: timestamp_bits=30 max_order=12 bucket_order=0
console: SuperH (H)SCI(F) driver initialized
console: 88240.serial: ttySC0 at MMIO 0x88240 (irq = 215, base_baud = 0)
is a sci
console: console [ttySC0] enabled
console: 88248.serial: ttySC1 at MMIO 0x88248 (irq = 219, base_baud = 0)
is a sci
console: random: get_random_bytes called from 0x01002e48 with crng_init=0
console: Freeing unused kernel memory: 96K
console: This architecture does not have kernel memory protection.
console: Run /sbin/init as init process
console: Run /etc/init as init process
console: Run /bin/init as init process
console: Run /bin/sh as init process
console: Sash command shell (version 1.1.1)
console: /> printenv
console: HOME=/
console: TERM=linux