Message ID | 20190520083101.10229-1-manivannan.sadhasivam@linaro.org |
---|---|
Headers | show |
Series | Add pinconf support for BM1880 SoC | expand |
On Mon, May 20, 2019 at 10:31 AM Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote: > Earlier, the PWM registers were included as part of the pinctrl memory > map, but this turned to be useless as the muxing is being handled by the > SoC pin controller itself. Hence, this commit removes the pwm register > mapping from the pinctrl node to make it more clean. > > Fixes: af2ff87de413 ("arm64: dts: bitmain: Add pinctrl support for BM1880 SoC") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Please funnel this through ARM SoC. Yours, Linus Walleij
On Mon, May 20, 2019 at 10:31 AM Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote: > Add pinconf support for Bitmain BM1880 SoC. Pinconf support includes > pin bias, slew rate and schmitt trigger. Drive strength support will > be added later. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Patch applied. Yours, Linus Walleij