| Message ID | 1553085490-42870-1-git-send-email-shiwanglai@hisilicon.com |
|---|---|
| Headers | show |
| Series | Support static funnel and CoreSight DT on Hikey960 | expand |
On 20/03/2019 12:38, Wanglai Shi wrote: > From: Leo Yan <leo.yan@linaro.org> > > Since CoreSight hardware topology can use a 'hidden' funnel in the > trace data path, this kind funnel doesn't have register for accessing > and is used by default from hardware design perspective. Below is an > example for related hardware topology: > > +------+ +------+ > | cpu0 |->| ETM |-\ > +------+ +------+ \-> +--------+ +-----+ > ...... | Funnel |->| ETF |-\ Hidden funnel > +------+ +------+ /-> +--------+ +-----+ \ | > | cpu3 |->| ETM |-/ \ V > +------+ +------+ \-> +--------+ > | Funnel |-> ... > +------+ +------+ /-> +--------+ > | cpu4 |->| ETM |-\ / > +------+ +------+ \-> +--------+ +-----+ / > ...... | Funnel |->| ETF |-/ > +------+ +------+ /-> +--------+ +-----+ > | cpu7 |->| ETM |-/ > +------+ +------+ > > The CoreSight funnel driver only supports dynamic funnel with > registration register resource, thus it cannot support for the static > funnel case and it's impossible to create trace data path for this case. > > This patch is to extend CoreSight funnel driver to support both for > static funnel and dynamic funnel. For the dynamic funnel it reuses the > code existed in the driver, for static funnel the driver will support > device probe if without providing register resource and the driver skips > registers accessing when detect the register base is NULL. > > Signed-off-by: Leo Yan <leo.yan@linaro.org> > --- Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com> > -static const struct amba_id funnel_ids[] = { > +static int static_funnel_probe(struct platform_device *pdev) > +{ > + int ret; > + > + pm_runtime_get_noresume(&pdev->dev); > + pm_runtime_set_active(&pdev->dev); > + pm_runtime_enable(&pdev->dev); > + > + /* Static funnel do not have programming base */ > + ret = funnel_probe(&pdev->dev, NULL); > + > + if (ret) { > + pm_runtime_put_noidle(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > + } > + > + return ret; > +} > + > +static const struct of_device_id static_funnel_match[] = { > + {.compatible = "arm,coresight-funnel"}, There is a potential issue with re-using the "compatible" string already reserved for the normal programmable funnel. We may handle a programmable funnel as non-programmable one, which is not good. Do we need to use "arm,coresight-static-funnel" ? Otherwise, looks good to me. Suzuki
On Wed, 20 Mar 2019 at 06:54, Wanglai Shi <shiwanglai@hisilicon.com> wrote: > > This patch adds DT bindings for the CoreSight trace components > on hi3660, which is used by 96boards Hikey960. > > Signed-off-by: Wanglai Shi <shiwanglai@hisilicon.com> This patch too needs to be on its own since it is maintained by Wei. Thanks, Mathieu > --- > .../boot/dts/hisilicon/hi3660-coresight.dtsi | 456 ++++++++++++++++++ > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 + > 2 files changed, 458 insertions(+) > create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > new file mode 100644 > index 000000000000..b6271fb407b7 > --- /dev/null > +++ b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > @@ -0,0 +1,456 @@ > +// SPDX-License-Identifier: GPL-2.0 > + > +/* > + * dtsi for Hisilicon Hi3660 Coresight > + * > + * Copyright (C) 2016-2018 Hisilicon Ltd. > + * > + * Author: Wanglai Shi <shiwanglai@hisilicon.com> > + * > + */ > +/ { > + soc { > + /* A53 cluster internals */ > + etm@ecc40000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0 0xecc40000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + cpu = <&cpu0>; > + > + out-ports { > + port { > + etm0_out: endpoint { > + remote-endpoint = > + <&cluster0_funnel_in0>; > + }; > + }; > + }; > + }; > + > + etm@ecd40000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0 0xecd40000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + cpu = <&cpu1>; > + > + out-ports { > + port { > + etm1_out: endpoint { > + remote-endpoint = > + <&cluster0_funnel_in1>; > + }; > + }; > + }; > + }; > + > + etm@ece40000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0 0xece40000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + cpu = <&cpu2>; > + > + out-ports { > + port { > + etm2_out: endpoint { > + remote-endpoint = > + <&cluster0_funnel_in2>; > + }; > + }; > + }; > + }; > + > + etm@ecf40000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0 0xecf40000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + cpu = <&cpu3>; > + > + out-ports { > + port { > + etm3_out: endpoint { > + remote-endpoint = > + <&cluster0_funnel_in3>; > + }; > + }; > + }; > + }; > + > + funnel@ec801000 { > + compatible = "arm,coresight-funnel", "arm,primecell"; > + reg = <0 0xec801000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + out-ports { > + port { > + cluster0_funnel_out: endpoint { > + remote-endpoint = > + <&cluster0_etf_in>; > + }; > + }; > + }; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + cluster0_funnel_in0: endpoint { > + remote-endpoint = <&etm0_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + cluster0_funnel_in1: endpoint { > + remote-endpoint = <&etm1_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + cluster0_funnel_in2: endpoint { > + remote-endpoint = <&etm2_out>; > + }; > + }; > + > + port@3 { > + reg = <3>; > + cluster0_funnel_in3: endpoint { > + remote-endpoint = <&etm3_out>; > + }; > + }; > + }; > + }; > + > + etf@ec802000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0 0xec802000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + cluster0_etf_in: endpoint { > + remote-endpoint = > + <&cluster0_funnel_out>; > + }; > + }; > + }; > + > + out-ports { > + port { > + cluster0_etf_out: endpoint { > + remote-endpoint = > + <&combo_funnel_in0>; > + }; > + }; > + }; > + }; > + > + /* A73 cluster internals */ > + etm@ed440000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0 0xed440000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + cpu = <&cpu4>; > + > + out-ports { > + port { > + etm4_out: endpoint { > + remote-endpoint = > + <&cluster1_funnel_in0>; > + }; > + }; > + }; > + }; > + > + etm@ed540000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0 0xed540000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + cpu = <&cpu5>; > + > + out-ports { > + port { > + etm5_out: endpoint { > + remote-endpoint = > + <&cluster1_funnel_in1>; > + }; > + }; > + }; > + }; > + > + etm@ed640000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0 0xed640000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + cpu = <&cpu6>; > + > + out-ports { > + port { > + etm6_out: endpoint { > + remote-endpoint = > + <&cluster1_funnel_in2>; > + }; > + }; > + }; > + }; > + > + etm@ed740000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0 0xed740000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + cpu = <&cpu7>; > + > + out-ports { > + port { > + etm7_out: endpoint { > + remote-endpoint = > + <&cluster1_funnel_in3>; > + }; > + }; > + }; > + }; > + > + funnel@ed001000 { > + compatible = "arm,coresight-funnel", "arm,primecell"; > + reg = <0 0xed001000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + out-ports { > + port { > + cluster1_funnel_out: endpoint { > + remote-endpoint = > + <&cluster1_etf_in>; > + }; > + }; > + }; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + cluster1_funnel_in0: endpoint { > + remote-endpoint = <&etm4_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + cluster1_funnel_in1: endpoint { > + remote-endpoint = <&etm5_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + cluster1_funnel_in2: endpoint { > + remote-endpoint = <&etm6_out>; > + }; > + }; > + > + port@3 { > + reg = <3>; > + cluster1_funnel_in3: endpoint { > + remote-endpoint = <&etm7_out>; > + }; > + }; > + }; > + }; > + > + etf@ed002000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0 0xed002000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + cluster1_etf_in: endpoint { > + remote-endpoint = > + <&cluster1_funnel_out>; > + }; > + }; > + }; > + > + out-ports { > + port { > + cluster1_etf_out: endpoint { > + remote-endpoint = > + <&combo_funnel_in1>; > + }; > + }; > + }; > + }; > + > + /* An invisible combo funnel between clusters and top funnel */ > + funnel { > + compatible = "arm,coresight-funnel"; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + out-ports { > + port { > + combo_funnel_out: endpoint { > + remote-endpoint = > + <&top_funnel_in>; > + }; > + }; > + }; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + combo_funnel_in0: endpoint { > + remote-endpoint = > + <&cluster0_etf_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + combo_funnel_in1: endpoint { > + remote-endpoint = > + <&cluster1_etf_out>; > + }; > + }; > + }; > + }; > + > + /* Top internals */ > + funnel@ec031000 { > + compatible = "arm,coresight-funnel", "arm,primecell"; > + reg = <0 0xec031000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + out-ports { > + port { > + top_funnel_out: endpoint { > + remote-endpoint = > + <&top_etf_in>; > + }; > + }; > + }; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + top_funnel_in: endpoint { > + remote-endpoint = > + <&combo_funnel_out>; > + }; > + }; > + }; > + }; > + > + etf@ec036000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0 0xec036000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + top_etf_in: endpoint { > + remote-endpoint = > + <&top_funnel_out>; > + }; > + }; > + }; > + > + out-ports { > + port { > + top_etf_out: endpoint { > + remote-endpoint = > + <&replicator_in>; > + }; > + }; > + }; > + }; > + > + replicator { > + compatible = "arm,coresight-replicator"; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + replicator_in: endpoint { > + remote-endpoint = > + <&top_etf_out>; > + }; > + }; > + }; > + > + out-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + replicator0_out0: endpoint { > + remote-endpoint = <&etr_in>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + replicator0_out1: endpoint { > + remote-endpoint = <&tpiu_in>; > + }; > + }; > + }; > + }; > + > + etr@ec033000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0 0xec033000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + etr_in: endpoint { > + remote-endpoint = > + <&replicator0_out0>; > + }; > + }; > + }; > + }; > + > + tpiu@ec032000 { > + compatible = "arm,coresight-tpiu", "arm,primecell"; > + reg = <0 0xec032000 0 0x1000>; > + clocks = <&crg_ctrl HI3660_PCLK>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + tpiu_in: endpoint { > + remote-endpoint = > + <&replicator0_out1>; > + }; > + }; > + }; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > index 57ebefbd156f..36fdc9cd443d 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -1216,3 +1216,5 @@ > }; > }; > }; > + > +#include "hi3660-coresight.dtsi" > -- > 2.17.1 >
Hi Suzuki, On Wed, Mar 20, 2019 at 01:52:58PM +0000, Suzuki K Poulose wrote: > > > On 20/03/2019 12:38, Wanglai Shi wrote: > > From: Leo Yan <leo.yan@linaro.org> > > > > Since CoreSight hardware topology can use a 'hidden' funnel in the > > trace data path, this kind funnel doesn't have register for accessing > > and is used by default from hardware design perspective. Below is an > > example for related hardware topology: > > > > +------+ +------+ > > | cpu0 |->| ETM |-\ > > +------+ +------+ \-> +--------+ +-----+ > > ...... | Funnel |->| ETF |-\ Hidden funnel > > +------+ +------+ /-> +--------+ +-----+ \ | > > | cpu3 |->| ETM |-/ \ V > > +------+ +------+ \-> +--------+ > > | Funnel |-> ... > > +------+ +------+ /-> +--------+ > > | cpu4 |->| ETM |-\ / > > +------+ +------+ \-> +--------+ +-----+ / > > ...... | Funnel |->| ETF |-/ > > +------+ +------+ /-> +--------+ +-----+ > > | cpu7 |->| ETM |-/ > > +------+ +------+ > > > > The CoreSight funnel driver only supports dynamic funnel with > > registration register resource, thus it cannot support for the static > > funnel case and it's impossible to create trace data path for this case. > > > > This patch is to extend CoreSight funnel driver to support both for > > static funnel and dynamic funnel. For the dynamic funnel it reuses the > > code existed in the driver, for static funnel the driver will support > > device probe if without providing register resource and the driver skips > > registers accessing when detect the register base is NULL. > > > > Signed-off-by: Leo Yan <leo.yan@linaro.org> > > --- > > Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com> Will add the tag in next version, and very appreciate you shared me offline the replicator code for reference! > > -static const struct amba_id funnel_ids[] = { > > +static int static_funnel_probe(struct platform_device *pdev) > > +{ > > + int ret; > > + > > + pm_runtime_get_noresume(&pdev->dev); > > + pm_runtime_set_active(&pdev->dev); > > + pm_runtime_enable(&pdev->dev); > > + > > + /* Static funnel do not have programming base */ > > + ret = funnel_probe(&pdev->dev, NULL); > > + > > + if (ret) { > > + pm_runtime_put_noidle(&pdev->dev); > > + pm_runtime_disable(&pdev->dev); > > + } > > + > > + return ret; > > +} > > + > > +static const struct of_device_id static_funnel_match[] = { > > + {.compatible = "arm,coresight-funnel"}, > > There is a potential issue with re-using the "compatible" string > already reserved for the normal programmable funnel. We may handle > a programmable funnel as non-programmable one, which is not good. > > Do we need to use "arm,coresight-static-funnel" ? This suggestion makes sense, will do this. > Otherwise, looks good to me. Thanks for reviewing. Thanks, Leo Yan
From: Leo Yan <leo.yan@linaro.org> Since before there have no platforms use static funnel in mainline kernel (though maybe some in-house SoC has used it but didn't upstream for mainline kernel yet so we don't be aware for it), when enable CoreSight DT binding for hikey960, we found the SoC uses the static funnel in the link path and but it's not supported in CoreSight funnel driver. So patches 0001/0002 are two patches to support static funnel, this first patch is to update DT documentation to support static funnel (we call it as non-configurable funnel in documentation); the second patch is to support the static funnel in the CoreSight funnel driver. Credits to Suzuki shared code for CoreSight replicator refactoring, patches 0001/0002 heavily follows up the same fashion in Suzuki's shared code. Patch 0003 is the DT binding for CoreSight enabling on Hikey960, and it's the first consumer for use static funnel binding. This patch set has been tested on Hikey960 with perf command for trace data recording and decoding with below commands: # perf record -e cs_etm/@20010000.etf/ --per-thread ./main # perf report --tui Leo Yan (2): dt-bindings: arm: coresight: Support non-configurable funnel coresight: funnel: Support static funnel Wanglai Shi (1): arm64: dts: hi3660: Add CoreSight support .../devicetree/bindings/arm/coresight.txt | 45 +- .../boot/dts/hisilicon/hi3660-coresight.dtsi | 456 ++++++++++++++++++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 + .../hwtracing/coresight/coresight-funnel.c | 112 +++-- 4 files changed, 585 insertions(+), 30 deletions(-) create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi -- 2.17.1