diff mbox series

[edk2,edk2-platforms,6/8] Silicon/SynQuacer/Stage2Tables: fix 32-bit build

Message ID 20190114170205.9748-7-ard.biesheuvel@linaro.org
State New
Headers show
Series Silicon/SynQuacer: add support for 32-bit mode | expand

Commit Message

Ard Biesheuvel Jan. 14, 2019, 5:02 p.m. UTC 
The static stage2 page tables don't contain any code, but we are
relying on the linker to resolve the references to the next level
tables, so we can only use native word size quantities. So add a
CPP macro to emit the same quantity in different ways.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

---
 Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

-- 
2.17.1

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Comments

Ard Biesheuvel Jan. 14, 2019, 5:52 p.m. UTC | #1 
On Mon, 14 Jan 2019 at 18:02, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>

> The static stage2 page tables don't contain any code, but we are

> relying on the linker to resolve the references to the next level

> tables, so we can only use native word size quantities. So add a

> CPP macro to emit the same quantity in different ways.

>

> Contributed-under: TianoCore Contribution Agreement 1.1

> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> ---

>  Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S | 12 +++++++++---


The 'elf64-little' in the .inf is now wrong as well, but it seems I
can just remove that and objcopy will detect the input format.

>  1 file changed, 9 insertions(+), 3 deletions(-)

>

> diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S

> index af55f27bca47..28c7a6ac970f 100644

> --- a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S

> +++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S

> @@ -32,6 +32,12 @@

>  #define TT_S2_L3_PAGE               (0x1 << 1)

>  #define TT_S2_VALID                 (0x1 << 0)

>

> +#ifdef __aarch64__

> +#define QWORD(x)    .quad (x)

> +#else

> +#define QWORD(x)    .long (x), 0

> +#endif

> +

>    .altmacro

>    .macro    for, start, count, do, arg2, arg3, arg4

>    .if       \count == 1

> @@ -69,7 +75,7 @@

>    .section  ".rodata", "a", %progbits

>    /* level 1 */

>    s2_mem_entry  0      /* 0x0000_0000 - 0x3fff_ffff */

> -  .quad   1f + TT_S2_TABLE /* 0x4000_0000 - 0x7fff_ffff */

> +  QWORD   (1f + TT_S2_TABLE) /* 0x4000_0000 - 0x7fff_ffff */

>    for       2, 246, s2_mem_entry  /* 0x8000_0000 - 0x3d_ffff_ffff */

>    for     248,   8, s2_dev_entry  /* PCIe MMIO64 */

>    for     256, 768, s2_mem_entry  /* 0x40_0000_0000 - 0xff_ffff_ffff */

> @@ -77,12 +83,12 @@

>    /* level 2 */

>  1:for     0, 256, s2_mem_entry, 21, 0x40000000, 1

>

> -  .quad   2f + TT_S2_TABLE /* 0x6000_0000 -> RC #0 bus 0 */

> +  QWORD   (2f + TT_S2_TABLE) /* 0x6000_0000 -> RC #0 bus 0 */

>    for     1, 15, s2_mem_entry, 21, 0x60000000

>    for     0, 48, s2_mem_entry, 21, 0x62000000, 1

>    for     0, 64, s2_dev_entry, 21, 0x68000000, 1 /* PCIe MMIO32 */

>

> -  .quad   3f + TT_S2_TABLE /* 0x7000_0000 -> RC #1 bus 0 */

> +  QWORD   (3f + TT_S2_TABLE) /* 0x7000_0000 -> RC #1 bus 0 */

>    for     1, 15, s2_mem_entry, 21, 0x70000000

>    for     0, 48, s2_mem_entry, 21, 0x72000000, 1

>    for     0, 64, s2_dev_entry, 21, 0x78000000, 1 /* PCIe MMIO32 */

> --

> 2.17.1

>

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Leif Lindholm Feb. 11, 2019, 4:45 p.m. UTC | #2 
On Mon, Jan 14, 2019 at 06:52:07PM +0100, Ard Biesheuvel wrote:
> On Mon, 14 Jan 2019 at 18:02, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:

> >

> > The static stage2 page tables don't contain any code, but we are

> > relying on the linker to resolve the references to the next level

> > tables, so we can only use native word size quantities. So add a

> > CPP macro to emit the same quantity in different ways.

> >

> > Contributed-under: TianoCore Contribution Agreement 1.1

> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> > ---

> >  Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S | 12 +++++++++---

> 

> The 'elf64-little' in the .inf is now wrong as well, but it seems I

> can just remove that and objcopy will detect the input format.


Hmm. Actually, no. When cross-compiling:

$ objcopy -O binary -j .rodata
/work/git/tianocore/Build/DeveloperBox/DEBUG_GCC5/AARCH64/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables/OUTPUT/Stage2Tables.elf
/work/git/tianocore/Build/DeveloperBox/DEBUG_GCC5/AARCH64/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables/OUTPUT/Stage2Tables.bin
objcopy: Unable to recognise the format of the input file
`/work/git/tianocore/Build/DeveloperBox/DEBUG_GCC5/AARCH64/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables/OUTPUT/Stage2Tables.elf'

If I put -I elf64-little back, the command succeeds.

If I explicitly call the cross-toolchain objcopy, the command succeeds
without that addition.

When building natively, this works fine without the flag.

Why do we even end up running the build machine native objcopy here?

/
    Leif

> >  1 file changed, 9 insertions(+), 3 deletions(-)

> >

> > diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S

> > index af55f27bca47..28c7a6ac970f 100644

> > --- a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S

> > +++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S

> > @@ -32,6 +32,12 @@

> >  #define TT_S2_L3_PAGE               (0x1 << 1)

> >  #define TT_S2_VALID                 (0x1 << 0)

> >

> > +#ifdef __aarch64__

> > +#define QWORD(x)    .quad (x)

> > +#else

> > +#define QWORD(x)    .long (x), 0

> > +#endif

> > +

> >    .altmacro

> >    .macro    for, start, count, do, arg2, arg3, arg4

> >    .if       \count == 1

> > @@ -69,7 +75,7 @@

> >    .section  ".rodata", "a", %progbits

> >    /* level 1 */

> >    s2_mem_entry  0      /* 0x0000_0000 - 0x3fff_ffff */

> > -  .quad   1f + TT_S2_TABLE /* 0x4000_0000 - 0x7fff_ffff */

> > +  QWORD   (1f + TT_S2_TABLE) /* 0x4000_0000 - 0x7fff_ffff */

> >    for       2, 246, s2_mem_entry  /* 0x8000_0000 - 0x3d_ffff_ffff */

> >    for     248,   8, s2_dev_entry  /* PCIe MMIO64 */

> >    for     256, 768, s2_mem_entry  /* 0x40_0000_0000 - 0xff_ffff_ffff */

> > @@ -77,12 +83,12 @@

> >    /* level 2 */

> >  1:for     0, 256, s2_mem_entry, 21, 0x40000000, 1

> >

> > -  .quad   2f + TT_S2_TABLE /* 0x6000_0000 -> RC #0 bus 0 */

> > +  QWORD   (2f + TT_S2_TABLE) /* 0x6000_0000 -> RC #0 bus 0 */

> >    for     1, 15, s2_mem_entry, 21, 0x60000000

> >    for     0, 48, s2_mem_entry, 21, 0x62000000, 1

> >    for     0, 64, s2_dev_entry, 21, 0x68000000, 1 /* PCIe MMIO32 */

> >

> > -  .quad   3f + TT_S2_TABLE /* 0x7000_0000 -> RC #1 bus 0 */

> > +  QWORD   (3f + TT_S2_TABLE) /* 0x7000_0000 -> RC #1 bus 0 */

> >    for     1, 15, s2_mem_entry, 21, 0x70000000

> >    for     0, 48, s2_mem_entry, 21, 0x72000000, 1

> >    for     0, 64, s2_dev_entry, 21, 0x78000000, 1 /* PCIe MMIO32 */

> > --

> > 2.17.1

> >

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diff mbox series

Patch

diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
index af55f27bca47..28c7a6ac970f 100644
--- a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
+++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
@@ -32,6 +32,12 @@ 
 #define TT_S2_L3_PAGE               (0x1 << 1)
 #define TT_S2_VALID                 (0x1 << 0)
 
+#ifdef __aarch64__
+#define QWORD(x)    .quad (x)
+#else
+#define QWORD(x)    .long (x), 0
+#endif
+
   .altmacro
   .macro    for, start, count, do, arg2, arg3, arg4
   .if       \count == 1
@@ -69,7 +75,7 @@ 
   .section  ".rodata", "a", %progbits
   /* level 1 */
   s2_mem_entry  0      /* 0x0000_0000 - 0x3fff_ffff */
-  .quad   1f + TT_S2_TABLE /* 0x4000_0000 - 0x7fff_ffff */
+  QWORD   (1f + TT_S2_TABLE) /* 0x4000_0000 - 0x7fff_ffff */
   for       2, 246, s2_mem_entry  /* 0x8000_0000 - 0x3d_ffff_ffff */
   for     248,   8, s2_dev_entry  /* PCIe MMIO64 */
   for     256, 768, s2_mem_entry  /* 0x40_0000_0000 - 0xff_ffff_ffff */
@@ -77,12 +83,12 @@ 
   /* level 2 */
 1:for     0, 256, s2_mem_entry, 21, 0x40000000, 1
 
-  .quad   2f + TT_S2_TABLE /* 0x6000_0000 -> RC #0 bus 0 */
+  QWORD   (2f + TT_S2_TABLE) /* 0x6000_0000 -> RC #0 bus 0 */
   for     1, 15, s2_mem_entry, 21, 0x60000000
   for     0, 48, s2_mem_entry, 21, 0x62000000, 1
   for     0, 64, s2_dev_entry, 21, 0x68000000, 1 /* PCIe MMIO32 */
 
-  .quad   3f + TT_S2_TABLE /* 0x7000_0000 -> RC #1 bus 0 */
+  QWORD   (3f + TT_S2_TABLE) /* 0x7000_0000 -> RC #1 bus 0 */
   for     1, 15, s2_mem_entry, 21, 0x70000000
   for     0, 48, s2_mem_entry, 21, 0x72000000, 1
   for     0, 64, s2_dev_entry, 21, 0x78000000, 1 /* PCIe MMIO32 */