diff mbox series

[5/7] drm/bridge: tc358767: reject modes which require too much BW

Message ID 20181029114701.26409-6-tomi.valkeinen@ti.com
State Superseded
Headers show
Series drm/bridge: tc358767: small fixes | expand

Commit Message

Tomi Valkeinen Oct. 29, 2018, 11:46 a.m. UTC
The current driver accepts any videomode with pclk < 154MHz. This is not
correct, as with 1 lane and/or 1.62Mbps speed not all videomodes can be
supported.

Add code to reject modes that require more bandwidth that is available.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 drivers/gpu/drm/bridge/tc358767.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Andrzej Hajda Nov. 19, 2018, 7:36 a.m. UTC | #1
On 29.10.2018 12:46, Tomi Valkeinen wrote:
> The current driver accepts any videomode with pclk < 154MHz. This is not
> correct, as with 1 lane and/or 1.62Mbps speed not all videomodes can be
> supported.
>
> Add code to reject modes that require more bandwidth that is available.
>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

> ---
>  drivers/gpu/drm/bridge/tc358767.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
> index ab299f4debfa..b026b5ef7378 100644
> --- a/drivers/gpu/drm/bridge/tc358767.c
> +++ b/drivers/gpu/drm/bridge/tc358767.c
> @@ -1114,10 +1114,20 @@ static bool tc_bridge_mode_fixup(struct drm_bridge *bridge,
>  static enum drm_mode_status tc_connector_mode_valid(struct drm_connector *connector,
>  				   struct drm_display_mode *mode)
>  {
> +	struct tc_data *tc = connector_to_tc(connector);
> +	u32 req, avail;
> +	u32 bits_per_pixel = 24;
> +
>  	/* DPI interface clock limitation: upto 154 MHz */
>  	if (mode->clock > 154000)
>  		return MODE_CLOCK_HIGH;
>  
> +	req = mode->clock * bits_per_pixel / 8 / 1000;
> +	avail = tc->link.base.num_lanes * tc->link.base.rate / 1000;


You can remove "/ 1000" from both lines.

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

 --
Regards
Andrzej



> +
> +	if (req > avail)
> +		return MODE_BAD;
> +
>  	return MODE_OK;
>  }
>
Tomi Valkeinen Nov. 27, 2018, 11:45 a.m. UTC | #2
On 19/11/18 09:36, Andrzej Hajda wrote:
> On 29.10.2018 12:46, Tomi Valkeinen wrote:
>> The current driver accepts any videomode with pclk < 154MHz. This is not
>> correct, as with 1 lane and/or 1.62Mbps speed not all videomodes can be
>> supported.
>>
>> Add code to reject modes that require more bandwidth that is available.
>>
>> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
> 
>> ---
>>  drivers/gpu/drm/bridge/tc358767.c | 10 ++++++++++
>>  1 file changed, 10 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
>> index ab299f4debfa..b026b5ef7378 100644
>> --- a/drivers/gpu/drm/bridge/tc358767.c
>> +++ b/drivers/gpu/drm/bridge/tc358767.c
>> @@ -1114,10 +1114,20 @@ static bool tc_bridge_mode_fixup(struct drm_bridge *bridge,
>>  static enum drm_mode_status tc_connector_mode_valid(struct drm_connector *connector,
>>  				   struct drm_display_mode *mode)
>>  {
>> +	struct tc_data *tc = connector_to_tc(connector);
>> +	u32 req, avail;
>> +	u32 bits_per_pixel = 24;
>> +
>>  	/* DPI interface clock limitation: upto 154 MHz */
>>  	if (mode->clock > 154000)
>>  		return MODE_CLOCK_HIGH;
>>  
>> +	req = mode->clock * bits_per_pixel / 8 / 1000;
>> +	avail = tc->link.base.num_lanes * tc->link.base.rate / 1000;
> 
> 
> You can remove "/ 1000" from both lines.
> 
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

Indeed, thanks!

 Tomi
diff mbox series

Patch

diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index ab299f4debfa..b026b5ef7378 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -1114,10 +1114,20 @@  static bool tc_bridge_mode_fixup(struct drm_bridge *bridge,
 static enum drm_mode_status tc_connector_mode_valid(struct drm_connector *connector,
 				   struct drm_display_mode *mode)
 {
+	struct tc_data *tc = connector_to_tc(connector);
+	u32 req, avail;
+	u32 bits_per_pixel = 24;
+
 	/* DPI interface clock limitation: upto 154 MHz */
 	if (mode->clock > 154000)
 		return MODE_CLOCK_HIGH;
 
+	req = mode->clock * bits_per_pixel / 8 / 1000;
+	avail = tc->link.base.num_lanes * tc->link.base.rate / 1000;
+
+	if (req > avail)
+		return MODE_BAD;
+
 	return MODE_OK;
 }