diff mbox series

serial: samsung: Enable baud clock for UART reset procedure in resume

Message ID 20180913082125.11849-1-m.szyprowski@samsung.com
State New
Headers show
Series serial: samsung: Enable baud clock for UART reset procedure in resume | expand

Commit Message

Marek Szyprowski Sept. 13, 2018, 8:21 a.m. UTC
Ensure that the baud clock is also enabled for UART register writes in
driver resume. On Exynos5433 SoC this is needed to avoid external abort
issue.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

---
 drivers/tty/serial/samsung.c | 8 ++++++++
 1 file changed, 8 insertions(+)

-- 
2.17.1

Comments

Krzysztof Kozlowski Sept. 17, 2018, 8:38 a.m. UTC | #1
On Thu, 13 Sep 2018 at 10:21, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
>

> Ensure that the baud clock is also enabled for UART register writes in

> driver resume. On Exynos5433 SoC this is needed to avoid external abort

> issue.

>

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  drivers/tty/serial/samsung.c | 8 ++++++++

>  1 file changed, 8 insertions(+)

>


Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 2f8fa184aafa..da1bd4bba8a9 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1941,7 +1941,11 @@  static int s3c24xx_serial_resume(struct device *dev)
 
 	if (port) {
 		clk_prepare_enable(ourport->clk);
+		if (!IS_ERR(ourport->baudclk))
+			clk_prepare_enable(ourport->baudclk);
 		s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port));
+		if (!IS_ERR(ourport->baudclk))
+			clk_disable_unprepare(ourport->baudclk);
 		clk_disable_unprepare(ourport->clk);
 
 		uart_resume_port(&s3c24xx_uart_drv, port);
@@ -1964,7 +1968,11 @@  static int s3c24xx_serial_resume_noirq(struct device *dev)
 			if (rx_enabled(port))
 				uintm &= ~S3C64XX_UINTM_RXD_MSK;
 			clk_prepare_enable(ourport->clk);
+			if (!IS_ERR(ourport->baudclk))
+				clk_prepare_enable(ourport->baudclk);
 			wr_regl(port, S3C64XX_UINTM, uintm);
+			if (!IS_ERR(ourport->baudclk))
+				clk_disable_unprepare(ourport->baudclk);
 			clk_disable_unprepare(ourport->clk);
 		}
 	}