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[0/2] target/arm: SVE fixes

Message ID 20180705191929.30773-1-richard.henderson@linaro.org
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Series target/arm: SVE fixes | expand

Message

Richard Henderson July 5, 2018, 7:19 p.m. UTC 
RISU testing with ARM Fast Models and VQ=16 showed up two bugs,
both affecting the PTRUE instruction.


r~


Richard Henderson (2):
  tcg: Restrict check_size_impl to multiples of the line size
  target/arm: Fix do_predset for large VL

 target/arm/translate-sve.c | 10 ++--------
 tcg/tcg-op-gvec.c          |  7 +++++--
 2 files changed, 7 insertions(+), 10 deletions(-)

-- 
2.17.1

Comments

Peter Maydell July 6, 2018, 10:44 a.m. UTC | #1 
On 5 July 2018 at 20:19, Richard Henderson <richard.henderson@linaro.org> wrote:
> RISU testing with ARM Fast Models and VQ=16 showed up two bugs,

> both affecting the PTRUE instruction.

>

>

> r~

>

>

> Richard Henderson (2):

>   tcg: Restrict check_size_impl to multiples of the line size

>   target/arm: Fix do_predset for large VL

>

>  target/arm/translate-sve.c | 10 ++--------

>  tcg/tcg-op-gvec.c          |  7 +++++--

>  2 files changed, 7 insertions(+), 10 deletions(-)




Applied to target-arm.next, thanks.

-- PMM