Message ID | 20180512004311.9299-1-richard.henderson@linaro.org |
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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id k84-v6sm10756406pfh.93.2018.05.11.17.43.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 17:43:13 -0700 (PDT) From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 17:42:44 -0700 Message-Id: <20180512004311.9299-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH v2 00/27] softfloat patch roundup X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org> |
Series |
softfloat patch roundup
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On 12 May 2018 at 01:42, Richard Henderson <richard.henderson@linaro.org> wrote: > This is my SNaN patch set, Alex's float-float refactor, and a couple > of other random outstanding fpu patches. This has been reordered so > as to be bisectable, since the float-float refactor requires the snan > work to avoid breakage. > > It probably doesn't matter, but this was built on top of my arm fp16 > patch set simply to make it easier to test. The whole tree is > > git://github.com/rth7680/qemu.git fpu-roundup I've added patches 1, 2, and 15 to target-arm.next: > fpu/softfloat: int_to_float ensure r fully initialised > fpu/softfloat: Don't set Invalid for float-to-int(MAXINT) > target/arm: Fix fp_status_f16 tininess before rounding thanks -- PMM