diff mbox series

[5/9] target/riscv: Honor CPU_DUMP_FPU

Message ID 20180511035240.4016-6-richard.henderson@linaro.org
State New
Headers show
Series Honor CPU_DUMP_FPU | expand

Commit Message

Richard Henderson May 11, 2018, 3:52 a.m. UTC
Cc: Michael Clark <mjc@sifive.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/riscv/cpu.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

-- 
2.17.0

Comments

Philippe Mathieu-Daudé May 13, 2018, 12:52 a.m. UTC | #1
On 05/11/2018 12:52 AM, Richard Henderson wrote:
> Cc: Michael Clark <mjc@sifive.com>

> Cc: Palmer Dabbelt <palmer@sifive.com>

> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>

> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


> ---

>  target/riscv/cpu.c | 16 +++++++++++-----

>  1 file changed, 11 insertions(+), 5 deletions(-)

> 

> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c

> index 4e5a56d4e3..4612f324c9 100644

> --- a/target/riscv/cpu.c

> +++ b/target/riscv/cpu.c

> @@ -199,6 +199,10 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,

>      int i;

>  

>      cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc      ", env->pc);

> +    if (flags & CPU_DUMP_FPU) {

> +        cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "fcsr    ",

> +                    cpu_riscv_get_fcsr(env));

> +    }

>  #ifndef CONFIG_USER_ONLY

>      cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid);

>      cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", env->mstatus);

> @@ -219,11 +223,13 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,

>              cpu_fprintf(f, "\n");

>          }

>      }

> -    for (i = 0; i < 32; i++) {

> -        cpu_fprintf(f, " %s %016" PRIx64,

> -            riscv_fpr_regnames[i], env->fpr[i]);

> -        if ((i & 3) == 3) {

> -            cpu_fprintf(f, "\n");

> +    if (flags & CPU_DUMP_FPU) {

> +        for (i = 0; i < 32; i++) {

> +            cpu_fprintf(f, " %s %016" PRIx64,

> +                riscv_fpr_regnames[i], env->fpr[i]);

> +            if ((i & 3) == 3) {

> +                cpu_fprintf(f, "\n");

> +            }

>          }

>      }

>  }

>
Michael Clark May 18, 2018, 2:16 a.m. UTC | #2
On Sun, May 13, 2018 at 12:52 PM, Philippe Mathieu-Daudé <f4bug@amsat.org>
wrote:

> On 05/11/2018 12:52 AM, Richard Henderson wrote:

> > Cc: Michael Clark <mjc@sifive.com>

> > Cc: Palmer Dabbelt <palmer@sifive.com>

> > Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>

> > Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

>

> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>



Reviewed-by: Michael Clark <mjc@sifive.com>



> > ---

> >  target/riscv/cpu.c | 16 +++++++++++-----

> >  1 file changed, 11 insertions(+), 5 deletions(-)

> >

> > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c

> > index 4e5a56d4e3..4612f324c9 100644

> > --- a/target/riscv/cpu.c

> > +++ b/target/riscv/cpu.c

> > @@ -199,6 +199,10 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE

> *f,

> >      int i;

> >

> >      cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc      ", env->pc);

> > +    if (flags & CPU_DUMP_FPU) {

> > +        cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "fcsr    ",

> > +                    cpu_riscv_get_fcsr(env));

> > +    }

> >  #ifndef CONFIG_USER_ONLY

> >      cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid);

> >      cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", env->mstatus);

> > @@ -219,11 +223,13 @@ static void riscv_cpu_dump_state(CPUState *cs,

> FILE *f,

> >              cpu_fprintf(f, "\n");

> >          }

> >      }

> > -    for (i = 0; i < 32; i++) {

> > -        cpu_fprintf(f, " %s %016" PRIx64,

> > -            riscv_fpr_regnames[i], env->fpr[i]);

> > -        if ((i & 3) == 3) {

> > -            cpu_fprintf(f, "\n");

> > +    if (flags & CPU_DUMP_FPU) {

> > +        for (i = 0; i < 32; i++) {

> > +            cpu_fprintf(f, " %s %016" PRIx64,

> > +                riscv_fpr_regnames[i], env->fpr[i]);

> > +            if ((i & 3) == 3) {

> > +                cpu_fprintf(f, "\n");

> > +            }

> >          }

> >      }

> >  }

> >

>
diff mbox series

Patch

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 4e5a56d4e3..4612f324c9 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -199,6 +199,10 @@  static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
     int i;
 
     cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc      ", env->pc);
+    if (flags & CPU_DUMP_FPU) {
+        cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "fcsr    ",
+                    cpu_riscv_get_fcsr(env));
+    }
 #ifndef CONFIG_USER_ONLY
     cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid);
     cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", env->mstatus);
@@ -219,11 +223,13 @@  static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
             cpu_fprintf(f, "\n");
         }
     }
-    for (i = 0; i < 32; i++) {
-        cpu_fprintf(f, " %s %016" PRIx64,
-            riscv_fpr_regnames[i], env->fpr[i]);
-        if ((i & 3) == 3) {
-            cpu_fprintf(f, "\n");
+    if (flags & CPU_DUMP_FPU) {
+        for (i = 0; i < 32; i++) {
+            cpu_fprintf(f, " %s %016" PRIx64,
+                riscv_fpr_regnames[i], env->fpr[i]);
+            if ((i & 3) == 3) {
+                cpu_fprintf(f, "\n");
+            }
         }
     }
 }