diff mbox series

[2/2] reset: uniphier: add SATA reset control support and change SATA-PHY ID

Message ID 1522403084-18780-3-git-send-email-hayashi.kunihiko@socionext.com
State Accepted
Commit 786367176d61cacaeaad90a2690c0637971323ea
Headers show
Series reset: uniphier: add support for PCIe and SATA | expand

Commit Message

Kunihiko Hayashi March 30, 2018, 9:44 a.m. UTC 
Add reset lines for SATA controller on UniPhier SoCs.
This adds support for Pro4 and PXs3 in addition to PXs2.

And this changes the ID of the reset line for SATA-PHY on PXs2.
Since some SoCs have two controller instances with a common PHY, this moves
the ID of SATA-PHY for consistency.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

---
 drivers/reset/reset-uniphier.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

-- 
2.7.4

Comments

Masahiro Yamada April 2, 2018, 3:39 a.m. UTC | #1 
2018-03-30 18:44 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>:
> Add reset lines for SATA controller on UniPhier SoCs.

> This adds support for Pro4 and PXs3 in addition to PXs2.

>

> And this changes the ID of the reset line for SATA-PHY on PXs2.

> Since some SoCs have two controller instances with a common PHY, this moves

> the ID of SATA-PHY for consistency.

>

> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

> ---


Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>







-- 
Best Regards
Masahiro Yamada
Philipp Zabel April 3, 2018, 8:18 a.m. UTC | #2 
On Fri, 2018-03-30 at 18:44 +0900, Kunihiko Hayashi wrote:
> Add reset lines for SATA controller on UniPhier SoCs.

> This adds support for Pro4 and PXs3 in addition to PXs2.

> 

> And this changes the ID of the reset line for SATA-PHY on PXs2.

> Since some SoCs have two controller instances with a common PHY, this moves

> the ID of SATA-PHY for consistency.

> 

> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

> ---

>  drivers/reset/reset-uniphier.c | 8 +++++++-

>  1 file changed, 7 insertions(+), 1 deletion(-)

> 

> diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c

> index 55ae0f1..90e6caf 100644

> --- a/drivers/reset/reset-uniphier.c

> +++ b/drivers/reset/reset-uniphier.c

> @@ -63,6 +63,9 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = {

>  	UNIPHIER_RESETX(12, 0x2000, 6),		/* GIO (Ether, SATA, USB3) */

>  	UNIPHIER_RESETX(14, 0x2000, 17),	/* USB30 */

>  	UNIPHIER_RESETX(15, 0x2004, 17),	/* USB31 */

> +	UNIPHIER_RESETX(28, 0x2000, 18),	/* SATA0 */

> +	UNIPHIER_RESETX(29, 0x2004, 18),	/* SATA1 */

> +	UNIPHIER_RESETX(30, 0x2000, 19),	/* SATA-PHY */

>  	UNIPHIER_RESETX(40, 0x2000, 13),	/* AIO */

>  	UNIPHIER_RESET_END,

>  };

> @@ -90,7 +93,7 @@ static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = {

>  	UNIPHIER_RESETX(20, 0x2014, 5),		/* USB31-PHY0 */

>  	UNIPHIER_RESETX(21, 0x2014, 1),		/* USB31-PHY1 */

>  	UNIPHIER_RESETX(28, 0x2014, 12),	/* SATA */

> -	UNIPHIER_RESET(29, 0x2014, 8),		/* SATA-PHY (active high) */

> +	UNIPHIER_RESET(30, 0x2014, 8),		/* SATA-PHY (active high) */


This is a backwards incompatible change.
There is no DT in use that relies on this being 29 ?

regards
Philipp
Masahiro Yamada April 3, 2018, 8:35 a.m. UTC | #3 
2018-04-03 17:18 GMT+09:00 Philipp Zabel <p.zabel@pengutronix.de>:
> On Fri, 2018-03-30 at 18:44 +0900, Kunihiko Hayashi wrote:

>> Add reset lines for SATA controller on UniPhier SoCs.

>> This adds support for Pro4 and PXs3 in addition to PXs2.

>>

>> And this changes the ID of the reset line for SATA-PHY on PXs2.

>> Since some SoCs have two controller instances with a common PHY, this moves

>> the ID of SATA-PHY for consistency.

>>

>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

>> ---

>>  drivers/reset/reset-uniphier.c | 8 +++++++-

>>  1 file changed, 7 insertions(+), 1 deletion(-)

>>

>> diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c

>> index 55ae0f1..90e6caf 100644

>> --- a/drivers/reset/reset-uniphier.c

>> +++ b/drivers/reset/reset-uniphier.c

>> @@ -63,6 +63,9 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = {

>>       UNIPHIER_RESETX(12, 0x2000, 6),         /* GIO (Ether, SATA, USB3) */

>>       UNIPHIER_RESETX(14, 0x2000, 17),        /* USB30 */

>>       UNIPHIER_RESETX(15, 0x2004, 17),        /* USB31 */

>> +     UNIPHIER_RESETX(28, 0x2000, 18),        /* SATA0 */

>> +     UNIPHIER_RESETX(29, 0x2004, 18),        /* SATA1 */

>> +     UNIPHIER_RESETX(30, 0x2000, 19),        /* SATA-PHY */

>>       UNIPHIER_RESETX(40, 0x2000, 13),        /* AIO */

>>       UNIPHIER_RESET_END,

>>  };

>> @@ -90,7 +93,7 @@ static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = {

>>       UNIPHIER_RESETX(20, 0x2014, 5),         /* USB31-PHY0 */

>>       UNIPHIER_RESETX(21, 0x2014, 1),         /* USB31-PHY1 */

>>       UNIPHIER_RESETX(28, 0x2014, 12),        /* SATA */

>> -     UNIPHIER_RESET(29, 0x2014, 8),          /* SATA-PHY (active high) */

>> +     UNIPHIER_RESET(30, 0x2014, 8),          /* SATA-PHY (active high) */

>

> This is a backwards incompatible change.

> There is no DT in use that relies on this being 29 ?



Right.  No user for this reset line ever.



-- 
Best Regards
Masahiro Yamada
Philipp Zabel April 3, 2018, 8:47 a.m. UTC | #4 
On Tue, 2018-04-03 at 17:35 +0900, Masahiro Yamada wrote:
> 2018-04-03 17:18 GMT+09:00 Philipp Zabel <p.zabel@pengutronix.de>:

> > On Fri, 2018-03-30 at 18:44 +0900, Kunihiko Hayashi wrote:

> > > Add reset lines for SATA controller on UniPhier SoCs.

> > > This adds support for Pro4 and PXs3 in addition to PXs2.

> > > 

> > > And this changes the ID of the reset line for SATA-PHY on PXs2.

> > > Since some SoCs have two controller instances with a common PHY, this moves

> > > the ID of SATA-PHY for consistency.

> > > 

> > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

> > > ---

> > >  drivers/reset/reset-uniphier.c | 8 +++++++-

> > >  1 file changed, 7 insertions(+), 1 deletion(-)

> > > 

> > > diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c

> > > index 55ae0f1..90e6caf 100644

> > > --- a/drivers/reset/reset-uniphier.c

> > > +++ b/drivers/reset/reset-uniphier.c

> > > @@ -63,6 +63,9 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = {

> > >       UNIPHIER_RESETX(12, 0x2000, 6),         /* GIO (Ether, SATA, USB3) */

> > >       UNIPHIER_RESETX(14, 0x2000, 17),        /* USB30 */

> > >       UNIPHIER_RESETX(15, 0x2004, 17),        /* USB31 */

> > > +     UNIPHIER_RESETX(28, 0x2000, 18),        /* SATA0 */

> > > +     UNIPHIER_RESETX(29, 0x2004, 18),        /* SATA1 */

> > > +     UNIPHIER_RESETX(30, 0x2000, 19),        /* SATA-PHY */

> > >       UNIPHIER_RESETX(40, 0x2000, 13),        /* AIO */

> > >       UNIPHIER_RESET_END,

> > >  };

> > > @@ -90,7 +93,7 @@ static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = {

> > >       UNIPHIER_RESETX(20, 0x2014, 5),         /* USB31-PHY0 */

> > >       UNIPHIER_RESETX(21, 0x2014, 1),         /* USB31-PHY1 */

> > >       UNIPHIER_RESETX(28, 0x2014, 12),        /* SATA */

> > > -     UNIPHIER_RESET(29, 0x2014, 8),          /* SATA-PHY (active high) */

> > > +     UNIPHIER_RESET(30, 0x2014, 8),          /* SATA-PHY (active high) */

> > 

> > This is a backwards incompatible change.

> > There is no DT in use that relies on this being 29 ?

> 

> 

> Right.  No user for this reset line ever.


Thank you, I have applied both patches to reset/next.

regards
Philipp
diff mbox series

Patch

diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index 55ae0f1..90e6caf 100644
--- a/drivers/reset/reset-uniphier.c
+++ b/drivers/reset/reset-uniphier.c
@@ -63,6 +63,9 @@  static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = {
 	UNIPHIER_RESETX(12, 0x2000, 6),		/* GIO (Ether, SATA, USB3) */
 	UNIPHIER_RESETX(14, 0x2000, 17),	/* USB30 */
 	UNIPHIER_RESETX(15, 0x2004, 17),	/* USB31 */
+	UNIPHIER_RESETX(28, 0x2000, 18),	/* SATA0 */
+	UNIPHIER_RESETX(29, 0x2004, 18),	/* SATA1 */
+	UNIPHIER_RESETX(30, 0x2000, 19),	/* SATA-PHY */
 	UNIPHIER_RESETX(40, 0x2000, 13),	/* AIO */
 	UNIPHIER_RESET_END,
 };
@@ -90,7 +93,7 @@  static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = {
 	UNIPHIER_RESETX(20, 0x2014, 5),		/* USB31-PHY0 */
 	UNIPHIER_RESETX(21, 0x2014, 1),		/* USB31-PHY1 */
 	UNIPHIER_RESETX(28, 0x2014, 12),	/* SATA */
-	UNIPHIER_RESET(29, 0x2014, 8),		/* SATA-PHY (active high) */
+	UNIPHIER_RESET(30, 0x2014, 8),		/* SATA-PHY (active high) */
 	UNIPHIER_RESETX(40, 0x2000, 13),	/* AIO */
 	UNIPHIER_RESET_END,
 };
@@ -137,6 +140,9 @@  static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = {
 	UNIPHIER_RESETX(20, 0x200c, 17),	/* USB31-PHY0 */
 	UNIPHIER_RESETX(21, 0x200c, 19),	/* USB31-PHY1 */
 	UNIPHIER_RESETX(24, 0x200c, 3),		/* PCIe */
+	UNIPHIER_RESETX(28, 0x200c, 7),		/* SATA0 */
+	UNIPHIER_RESETX(29, 0x200c, 8),		/* SATA1 */
+	UNIPHIER_RESETX(30, 0x200c, 21),	/* SATA-PHY */
 	UNIPHIER_RESET_END,
 };