Message ID | 1521594198-52523-11-git-send-email-heyi.guo@linaro.org |
---|---|
State | New |
Headers | show |
Series | Hisilicon/D0x: Switch to generic PciHostBridge | expand |
On 21 March 2018 at 01:03, Heyi Guo <heyi.guo@linaro.org> wrote: > Address translation support is added to generic PciHostBridge driver > in edk2 by commit 74d0a33, so we can switch to it for Hisilicon D03 > and D05 which are using address translation between device address and > host address for resource BAR. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Heyi Guo <heyi.guo@linaro.org> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Cc: Leif Lindholm <leif.lindholm@linaro.org> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > Cc: Haojian Zhuang <haojian.zhuang@linaro.org> > --- > Silicon/Hisilicon/Hisilicon.dsc.inc | 6 +++++- > Platform/Hisilicon/D03/D03.dsc | 6 ++++-- > Platform/Hisilicon/D05/D05.dsc | 6 ++++-- > Platform/Hisilicon/D03/D03.fdf | 3 ++- > Platform/Hisilicon/D05/D05.fdf | 3 ++- > 5 files changed, 17 insertions(+), 7 deletions(-) > > diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc > index 77585933179e..8ee74a830e74 100644 > --- a/Silicon/Hisilicon/Hisilicon.dsc.inc > +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc > @@ -253,7 +253,11 @@ [PcdsFeatureFlag.common] > > [PcdsFixedAtBuild.common] > gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|44 > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0 > + # > + # IO is mapped to memory space, so we use the same size of > + # PcdPrePiCpuMemorySize > + # > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|44 As noted in reply to the previous patches, I think we should avoid 1:1 mapping the I/O space like this. 20 bits of I/O space should be plenty, i.e., up to 16 segments using 64 KB of I/O space each. > gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 > gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 > gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 > diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc > index 0b2bd29cdf83..26081a33a00a 100644 > --- a/Platform/Hisilicon/D03/D03.dsc > +++ b/Platform/Hisilicon/D03/D03.dsc > @@ -82,6 +82,8 @@ [LibraryClasses.common] > > LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf > SerialPortLib|Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.inf > + PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf > + PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf > > ## GIC on D02/D03 is not fully ARM GIC compatible: IRQ cannot be cancelled when > ## input signal is de-asserted, except for virtual timer interrupt IRQ #27. > @@ -336,6 +338,7 @@ [Components.common] > ArmPkg/Drivers/CpuDxe/CpuDxe.inf > MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf > Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf > > Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf > @@ -457,9 +460,8 @@ [Components.common] > <LibraryClasses> > NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf > } > - Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { > + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { > <LibraryClasses> > - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf > NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf > } > > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc > index 2150a6f4c0e9..d6febf471630 100644 > --- a/Platform/Hisilicon/D05/D05.dsc > +++ b/Platform/Hisilicon/D05/D05.dsc > @@ -97,6 +97,8 @@ [LibraryClasses.common] > > LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf > SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf > + PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf > + PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf > > [LibraryClasses.common.SEC] > ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf > @@ -472,6 +474,7 @@ [Components.common] > ArmPkg/Drivers/CpuDxe/CpuDxe.inf > MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf > Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf > > Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf > @@ -611,9 +614,8 @@ [Components.common] > <LibraryClasses> > NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf > } > - Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { > + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { > <LibraryClasses> > - DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf > NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf > } > > diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf > index e430d5c08982..0c843a3ce671 100644 > --- a/Platform/Hisilicon/D03/D03.fdf > +++ b/Platform/Hisilicon/D03/D03.fdf > @@ -157,6 +157,7 @@ [FV.FvMain] > INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > + INF Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf > INF Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf > > INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf > @@ -263,7 +264,7 @@ [FV.FvMain] > # PCI Support > # > INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf > - INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf > + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf > INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > > INF Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf > diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf > index 13a60837a607..b530e8e785a4 100644 > --- a/Platform/Hisilicon/D05/D05.fdf > +++ b/Platform/Hisilicon/D05/D05.fdf > @@ -161,6 +161,7 @@ [FV.FvMain] > INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > + INF Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf > INF Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf > > INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf > @@ -285,7 +286,7 @@ [FV.FvMain] > # PCI Support > # > INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf > - INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf > + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf > INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > > INF Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf > -- > 2.7.4 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc index 77585933179e..8ee74a830e74 100644 --- a/Silicon/Hisilicon/Hisilicon.dsc.inc +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc @@ -253,7 +253,11 @@ [PcdsFeatureFlag.common] [PcdsFixedAtBuild.common] gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|44 - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0 + # + # IO is mapped to memory space, so we use the same size of + # PcdPrePiCpuMemorySize + # + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|44 gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 0b2bd29cdf83..26081a33a00a 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -82,6 +82,8 @@ [LibraryClasses.common] LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf SerialPortLib|Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.inf + PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf + PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf ## GIC on D02/D03 is not fully ARM GIC compatible: IRQ cannot be cancelled when ## input signal is de-asserted, except for virtual timer interrupt IRQ #27. @@ -336,6 +338,7 @@ [Components.common] ArmPkg/Drivers/CpuDxe/CpuDxe.inf MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf @@ -457,9 +460,8 @@ [Components.common] <LibraryClasses> NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf } - Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { <LibraryClasses> - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf } diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 2150a6f4c0e9..d6febf471630 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -97,6 +97,8 @@ [LibraryClasses.common] LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf + PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf + PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf [LibraryClasses.common.SEC] ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf @@ -472,6 +474,7 @@ [Components.common] ArmPkg/Drivers/CpuDxe/CpuDxe.inf MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf @@ -611,9 +614,8 @@ [Components.common] <LibraryClasses> NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } - Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { <LibraryClasses> - DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index e430d5c08982..0c843a3ce671 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -157,6 +157,7 @@ [FV.FvMain] INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf INF Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf @@ -263,7 +264,7 @@ [FV.FvMain] # PCI Support # INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf - INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 13a60837a607..b530e8e785a4 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -161,6 +161,7 @@ [FV.FvMain] INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf INF Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf @@ -285,7 +286,7 @@ [FV.FvMain] # PCI Support # INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf - INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
Address translation support is added to generic PciHostBridge driver in edk2 by commit 74d0a33, so we can switch to it for Hisilicon D03 and D05 which are using address translation between device address and host address for resource BAR. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> --- Silicon/Hisilicon/Hisilicon.dsc.inc | 6 +++++- Platform/Hisilicon/D03/D03.dsc | 6 ++++-- Platform/Hisilicon/D05/D05.dsc | 6 ++++-- Platform/Hisilicon/D03/D03.fdf | 3 ++- Platform/Hisilicon/D05/D05.fdf | 3 ++- 5 files changed, 17 insertions(+), 7 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel