| Message ID | 1521781954-20526-1-git-send-email-hayashi.kunihiko@socionext.com |
|---|---|
| State | Accepted |
| Commit | 5573fe85c7e6f94613a357bfcbcec2b57492a8ed |
| Headers | show |
| Series | reset: uniphier: add ethernet reset control support for PXs3 | expand |
2018-03-23 14:12 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>: > Add reset lines for ethernet controller on PXs3 SoC. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > drivers/reset/reset-uniphier.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c > index e8bb023..fd3afbd 100644 > --- a/drivers/reset/reset-uniphier.c > +++ b/drivers/reset/reset-uniphier.c > @@ -121,6 +121,8 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { > static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { > UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ > UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ > + UNIPHIER_RESETX(6, 0x200c, 9), /* Ether0 */ > + UNIPHIER_RESETX(7, 0x200c, 10), /* Ether1 */ > UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */ > UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link (GIO0) */ > UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link (GIO1) */ > -- > 2.7.4 > Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> -- Best Regards Masahiro Yamada
On Fri, 2018-03-23 at 19:16 +0900, Masahiro Yamada wrote: > 2018-03-23 14:12 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>: > > Add reset lines for ethernet controller on PXs3 SoC. > > > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > > --- > > drivers/reset/reset-uniphier.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c > > index e8bb023..fd3afbd 100644 > > --- a/drivers/reset/reset-uniphier.c > > +++ b/drivers/reset/reset-uniphier.c > > @@ -121,6 +121,8 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { > > static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { > > UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ > > UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ > > + UNIPHIER_RESETX(6, 0x200c, 9), /* Ether0 */ > > + UNIPHIER_RESETX(7, 0x200c, 10), /* Ether1 */ > > UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */ > > UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link (GIO0) */ > > UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link (GIO1) */ > > -- > > 2.7.4 > > > > Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Thank you, applied to reset/next. regards Philipp
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index e8bb023..fd3afbd 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -121,6 +121,8 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ + UNIPHIER_RESETX(6, 0x200c, 9), /* Ether0 */ + UNIPHIER_RESETX(7, 0x200c, 10), /* Ether1 */ UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */ UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link (GIO0) */ UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link (GIO1) */
Add reset lines for ethernet controller on PXs3 SoC. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- drivers/reset/reset-uniphier.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.7.4