| Message ID | 20180116142337.24942-3-julien.grall@linaro.org |
|---|---|
| State | Accepted |
| Commit | 7975bff524c4e2c30efbf144de753f151d974e53 |
| Headers | show |
| Series | xen/arm64: Branch predictor hardening (XSA-254 variant 2) | expand |
On Tue, 16 Jan 2018, Julien Grall wrote: > Cortex-A72, A73 and A75 MIDR will be used to a follow-up for hardening > the branch predictor. > > This is part of XSA-254. > > Signed-off-by: Julien Grall <julien.grall@linaro.org> Acked-by: Stefano Stabellini <sstabellini@kernel.org> > --- > xen/include/asm-arm/processor.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h > index 65eb1071e1..3edab1b893 100644 > --- a/xen/include/asm-arm/processor.h > +++ b/xen/include/asm-arm/processor.h > @@ -47,10 +47,16 @@ > #define ARM_CPU_PART_CORTEX_A15 0xC0F > #define ARM_CPU_PART_CORTEX_A53 0xD03 > #define ARM_CPU_PART_CORTEX_A57 0xD07 > +#define ARM_CPU_PART_CORTEX_A72 0xD08 > +#define ARM_CPU_PART_CORTEX_A73 0xD09 > +#define ARM_CPU_PART_CORTEX_A75 0xD0A > > #define MIDR_CORTEX_A15 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A15) > #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53) > #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57) > +#define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) > +#define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73) > +#define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75) > > /* MPIDR Multiprocessor Affinity Register */ > #define _MPIDR_UP (30) > -- > 2.11.0 >
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 65eb1071e1..3edab1b893 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -47,10 +47,16 @@ #define ARM_CPU_PART_CORTEX_A15 0xC0F #define ARM_CPU_PART_CORTEX_A53 0xD03 #define ARM_CPU_PART_CORTEX_A57 0xD07 +#define ARM_CPU_PART_CORTEX_A72 0xD08 +#define ARM_CPU_PART_CORTEX_A73 0xD09 +#define ARM_CPU_PART_CORTEX_A75 0xD0A #define MIDR_CORTEX_A15 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A15) #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53) #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57) +#define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) +#define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73) +#define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75) /* MPIDR Multiprocessor Affinity Register */ #define _MPIDR_UP (30)
Cortex-A72, A73 and A75 MIDR will be used to a follow-up for hardening the branch predictor. This is part of XSA-254. Signed-off-by: Julien Grall <julien.grall@linaro.org> --- xen/include/asm-arm/processor.h | 6 ++++++ 1 file changed, 6 insertions(+)