@@ -1711,7 +1711,7 @@ The following options need to be configured:
for defining speed and slave address
- drivers/i2c/fsl_i2c.c:
- - activate i2c driver with CONFIG_SYS_I2C_FSL
+ - activate i2c driver with CONFIG_I2C_FSL
define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
@@ -1733,11 +1733,11 @@ The following options need to be configured:
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
- drivers/i2c/i2c_mxc.c
- - activate this driver with CONFIG_SYS_I2C_MXC
- - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
- - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
- - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
- - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
+ - activate this driver with CONFIG_I2C_MXC
+ - enable bus 1 with CONFIG_I2C_MXC_I2C1
+ - enable bus 2 with CONFIG_I2C_MXC_I2C2
+ - enable bus 3 with CONFIG_I2C_MXC_I2C3
+ - enable bus 4 with CONFIG_I2C_MXC_I2C4
- define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
- define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
- define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
@@ -1780,7 +1780,7 @@ The following options need to be configured:
- CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
- drivers/i2c/omap24xx_i2c.c
- - activate this driver with CONFIG_SYS_I2C_OMAP24XX
+ - activate this driver with CONFIG_I2C_OMAP24XX
- CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
- CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
- CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
@@ -1798,7 +1798,7 @@ The following options need to be configured:
- set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
- drivers/i2c/s3c24x0_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_S3C24X0
+ - activate this driver with CONFIG_I2C_S3C24X0
- This driver adds i2c buses (11 for Exynos5250, Exynos5420
9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
with a fix speed from 100000 and the slave addr 0!
@@ -38,7 +38,7 @@ int arch_cpu_init(void)
#if defined(CONFIG_DW_UDC)
periph1_clken |= MISC_USBDENB;
#endif
-#if defined(CONFIG_SYS_I2C_DW)
+#if defined(CONFIG_I2C_DW)
periph1_clken |= MISC_I2CENB;
#endif
#if defined(CONFIG_ST_SMI)
@@ -328,7 +328,7 @@ u32 mxc_get_clock(enum mxc_clock clk);
u32 imx_get_uartclk(void);
u32 imx_get_fecclk(void);
void clock_init(void);
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
#endif
#ifdef CONFIG_FEC_MXC
@@ -12,7 +12,7 @@ obj-y = iomux-v3.o
endif
ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
obj-y += timer.o cpu.o speed.o
-obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
+obj-$(CONFIG_I2C_MXC) += i2c-mxv7.o
endif
ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs))
obj-y += misc.o
@@ -20,7 +20,7 @@ obj-$(CONFIG_SPL_BUILD) += spl.o
endif
ifeq ($(SOC),$(filter $(SOC),mx7))
obj-y += cpu.o
-obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
+obj-$(CONFIG_I2C_MXC) += i2c-mxv7.o
obj-$(CONFIG_SYSCOUNTER_TIMER) += syscounter.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6 mx7))
@@ -94,7 +94,7 @@ void enable_usboh3_clk(bool enable)
MXC_CCM_CCGR2_USBOH3_60M(cg));
}
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
/* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
@@ -150,7 +150,7 @@ int enable_usdhc_clk(unsigned char enable, unsigned bus_num)
}
#endif
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
/* i2c_num can be from 0 - 3 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
@@ -520,7 +520,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
return 0;
}
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
/* i2c_num can be 0 - 3 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
@@ -123,7 +123,7 @@
#ifdef CONFIG_CMD_I2C
#ifndef CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#endif
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
@@ -23,7 +23,7 @@ config OMAP34XX
imply SPL_OMAP3_ID_NAND
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
- imply SYS_I2C_OMAP24XX
+ imply I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply TWL4030_POWER
@@ -42,7 +42,7 @@ config OMAP44XX
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
- imply SYS_I2C_OMAP24XX
+ imply I2C_OMAP24XX
imply SYS_THUMB_BUILD
config OMAP54XX
@@ -62,7 +62,7 @@ config OMAP54XX
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
- imply SYS_I2C_OMAP24XX
+ imply I2C_OMAP24XX
config TI814X
bool "TI814X SoC"
@@ -86,7 +86,7 @@ config AM43XX
imply SPL_OF_TRANSLATE
imply SPL_SEPARATE_BSS
imply SPL_SYS_MALLOC_SIMPLE
- imply SYS_I2C_OMAP24XX
+ imply I2C_OMAP24XX
imply SYS_THUMB_BUILD
help
Support for AM43xx SOC from Texas Instruments.
@@ -97,7 +97,7 @@ config AM43XX
config AM33XX
bool "AM33XX SoC"
- imply SYS_I2C_OMAP24XX
+ imply I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply USE_TINY_PRINTF
help
@@ -772,7 +772,7 @@ void per_clocks_enable(void)
setbits_le32(&prcm_base->iclken_per, 0x00020000);
#endif
-#ifdef CONFIG_SYS_I2C_OMAP24XX
+#ifdef CONFIG_I2C_OMAP24XX
/* Turn on all 3 I2C clocks */
setbits_le32(&prcm_base->fclken1_core, 0x00038000);
setbits_le32(&prcm_base->iclken1_core, 0x00038000); /* I2C1,2,3 = on */
@@ -89,7 +89,7 @@ void cpu_init_f(void)
out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
#endif
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
out_8(&gpio->par_i2c, GPIO_PAR_I2C_SCL_SCL | GPIO_PAR_I2C_SDA_SDA);
#endif
@@ -118,7 +118,7 @@ int get_clocks(void)
gd->bus_clk = gd->arch.flb_clk;
}
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
gd->arch.i2c1_clk = gd->bus_clk;
#endif
@@ -106,7 +106,7 @@ void cpu_init_f(void)
out_be32(&fbcs->csmr7, CONFIG_SYS_CS7_MASK);
#endif
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
CONFIG_SYS_I2C_PINMUX_REG &= CONFIG_SYS_I2C_PINMUX_CLR;
CONFIG_SYS_I2C_PINMUX_REG |= CONFIG_SYS_I2C_PINMUX_SET;
#endif
@@ -31,7 +31,7 @@ int get_clocks(void)
gd->bus_clk = CONFIG_SYS_CLK;
gd->cpu_clk = (gd->bus_clk * 2);
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
gd->arch.i2c1_clk = gd->bus_clk;
#endif
@@ -212,7 +212,7 @@ void cpu_init_f(void)
/* FlexBus Chipselect */
init_fbcs();
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
CONFIG_SYS_I2C_PINMUX_REG =
CONFIG_SYS_I2C_PINMUX_REG & CONFIG_SYS_I2C_PINMUX_CLR;
CONFIG_SYS_I2C_PINMUX_REG |= CONFIG_SYS_I2C_PINMUX_SET;
@@ -470,7 +470,7 @@ void cpu_init_f(void)
init_fbcs();
#endif /* #ifndef CONFIG_MONITOR_IS_IN_RAM */
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
CONFIG_SYS_I2C_PINMUX_REG &= CONFIG_SYS_I2C_PINMUX_CLR;
CONFIG_SYS_I2C_PINMUX_REG |= CONFIG_SYS_I2C_PINMUX_SET;
#endif
@@ -74,7 +74,7 @@ int get_clocks (void)
gd->bus_clk = gd->cpu_clk;
#endif
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
gd->arch.i2c1_clk = gd->bus_clk;
#ifdef CONFIG_SYS_I2C2_FSL_OFFSET
gd->arch.i2c2_clk = gd->bus_clk;
@@ -82,7 +82,7 @@ void cpu_init_f(void)
out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
#endif
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
out_8(&gpio->par_feci2c,
GPIO_PAR_FECI2C_SDA_SDA | GPIO_PAR_FECI2C_SCL_SCL);
#endif
@@ -276,7 +276,7 @@ void cpu_init_f(void)
out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
#endif
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
out_8(&gpio->par_feci2c,
GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA);
#endif
@@ -254,7 +254,7 @@ int get_clocks(void)
gd->bus_clk = clock_pll(CONFIG_SYS_CLK / 1000, 0) * 1000;
gd->cpu_clk = (gd->bus_clk * 3);
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
gd->arch.i2c1_clk = gd->bus_clk;
#endif
@@ -257,7 +257,7 @@ void setup_5445x_clocks(void)
#endif
}
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
gd->arch.i2c1_clk = gd->bus_clk;
#endif
}
@@ -79,7 +79,7 @@ void cpu_init_f(void)
out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
#endif
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
out_be16(&gpio->par_feci2cirq,
GPIO_PAR_FECI2CIRQ_SCL | GPIO_PAR_FECI2CIRQ_SDA);
#endif
@@ -24,7 +24,7 @@ int get_clocks(void)
gd->bus_clk = CONFIG_SYS_CLK;
gd->cpu_clk = (gd->bus_clk * 2);
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
gd->arch.i2c1_clk = gd->bus_clk;
#endif
@@ -10,7 +10,7 @@
/* Architecture-specific global data */
struct arch_global_data {
-#ifdef CONFIG_SYS_I2C_FSL
+#ifdef CONFIG_I2C_FSL
unsigned long i2c1_clk;
unsigned long i2c2_clk;
#endif
@@ -25,7 +25,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
PAD_CTL_HYS)
@@ -57,9 +57,9 @@ static void cl_som_imx7_setup_i2c(void)
{
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &cl_som_imx7_i2c_pad_info2);
}
-#else /* !CONFIG_SYS_I2C_MXC */
+#else /* !CONFIG_I2C_MXC */
static void cl_som_imx7_setup_i2c(void) {}
-#endif /* CONFIG_SYS_I2C_MXC */
+#endif /* CONFIG_I2C_MXC */
int dram_init(void)
{
@@ -256,7 +256,7 @@ int sata_stop(void)
static int cm_fx6_setup_issd(void) { return 0; }
#endif
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
PAD_CTL_ODE | PAD_CTL_SRE_FAST)
@@ -398,7 +398,7 @@ void board_mmc_power_init(void)
}
#endif
-#ifdef CONFIG_SYS_I2C_OMAP24XX
+#ifdef CONFIG_I2C_OMAP24XX
/*
* Routine: reset_net_chip
* Description: reset the Ethernet controller via TPS65930 GPIO
@@ -345,7 +345,7 @@ int board_init(void)
/* Enable eim_slow clocks */
setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET);
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
if (is_mx6dq()) {
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info0);
setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info1);
@@ -82,7 +82,7 @@ CONFIG_CMD_DATE -- enable to use date feature in U-Boot
CONFIG_MCFTMR -- define to use DMA timer
CONFIG_MCFPIT -- define to use PIT timer
-CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
+CONFIG_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
@@ -90,7 +90,7 @@ MCFFEC_TOUT_LOOP -- set FEC timeout loop
CONFIG_MCFTMR -- define to use DMA timer
CONFIG_MCFPIT -- define to use PIT timer
-CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
+CONFIG_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
@@ -89,7 +89,7 @@ MCFFEC_TOUT_LOOP -- set FEC timeout loop
CONFIG_MCFTMR -- define to use DMA timer
CONFIG_MCFPIT -- define to use PIT timer
-CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
+CONFIG_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
@@ -97,7 +97,7 @@ CONFIG_DOS_PARTITION -- enable DOS read/write
CONFIG_SLTTMR -- define to use SLT timer
-CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
+CONFIG_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
@@ -525,7 +525,7 @@ int board_init(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
@@ -153,7 +153,7 @@ static void iox74lv_init(void)
gpio_direction_output(IOX_STCP, 1);
};
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
/* I2C1 for PMIC and EEPROM */
static struct i2c_pads_info i2c_pad_info1 = {
@@ -634,7 +634,7 @@ int board_init(void)
iox74lv_init();
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
@@ -123,7 +123,7 @@ int misc_init_r(void)
volatile unsigned int ctr;
u32 reset;
-#ifdef CONFIG_SYS_I2C_OMAP24XX
+#ifdef CONFIG_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
@@ -350,7 +350,7 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
#endif
@@ -346,7 +346,7 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info);
#endif
@@ -502,7 +502,7 @@ int board_init(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
@@ -57,7 +57,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define RMII_PHY_RESET IMX_GPIO_NR(1, 28)
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
/* I2C2 for PMIC */
struct i2c_pads_info i2c_pad_info1 = {
@@ -275,7 +275,7 @@ int board_init(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- #ifdef CONFIG_SYS_I2C_MXC
+ #ifdef CONFIG_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
@@ -40,7 +40,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
/* I2C4 for PMIC */
static struct i2c_pads_info i2c_pad_info4 = {
@@ -240,7 +240,7 @@ int board_early_init_f(void)
{
setup_iomux_uart();
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info4);
#endif
@@ -43,7 +43,7 @@ int board_init(void)
*/
int misc_init_r(void)
{
-#ifdef CONFIG_SYS_I2C_OMAP24XX
+#ifdef CONFIG_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
@@ -203,7 +203,7 @@ int misc_init_r(void)
{
twl4030_power_init();
-#ifdef CONFIG_SYS_I2C_OMAP24XX
+#ifdef CONFIG_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
@@ -79,7 +79,7 @@ int dram_init(void)
return 0;
}
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
/* I2C1 for PMIC */
static struct i2c_pads_info i2c_pad_info1 = {
@@ -349,7 +349,7 @@ int board_init(void)
/* Active high for ncp692 */
gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
@@ -34,7 +34,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
/* I2C1 for PMIC */
static struct i2c_pads_info i2c_pad_info1 = {
@@ -157,7 +157,7 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- #ifdef CONFIG_SYS_I2C_MXC
+ #ifdef CONFIG_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
@@ -43,7 +43,7 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEYBOARD=y
CONFIG_CROS_EC_KEYB=y
@@ -45,7 +45,7 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEYBOARD=y
CONFIG_CROS_EC_KEYB=y
@@ -58,7 +58,7 @@ CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_INTEL=y
+CONFIG_I2C_INTEL=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
CONFIG_DEBUG_UART_BASE=0x3f8
@@ -41,7 +41,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_INTEL=y
+CONFIG_I2C_INTEL=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
CONFIG_DEBUG_UART_BASE=0x3f8
@@ -44,7 +44,7 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEYBOARD=y
CONFIG_CROS_EC_KEYB=y
@@ -45,7 +45,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_INTEL=y
+CONFIG_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_E1000=y
CONFIG_DEBUG_UART_BASE=0x3f8
@@ -45,7 +45,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_INTEL=y
+CONFIG_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_E1000=y
CONFIG_USB_STORAGE=y
@@ -38,7 +38,7 @@ CONFIG_SPL_OF_TRANSLATE=y
CONFIG_DM_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_I2C_MVTWSI=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_SDHCI=y
@@ -38,7 +38,7 @@ CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_I2C_MVTWSI=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_PXA3XX=y
@@ -13,7 +13,7 @@ CONFIG_CMD_I2C=y
CONFIG_REGMAP=y
CONFIG_CLK=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_ASPEED=y
+CONFIG_I2C_ASPEED=y
CONFIG_PINCTRL=y
CONFIG_RAM=y
CONFIG_DM_RESET=y
@@ -30,7 +30,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
@@ -28,7 +28,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
@@ -39,7 +39,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
@@ -21,7 +21,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
@@ -32,7 +32,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
@@ -20,7 +20,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -42,7 +42,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
@@ -42,7 +42,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_DM_KEYBOARD=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
@@ -32,7 +32,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -29,7 +29,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_BLK is not set
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
@@ -36,7 +36,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_LIST="imx6q-icore imx6dl-icore"
CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
@@ -33,7 +33,7 @@ CONFIG_CMD_UBI=y
CONFIG_OF_LIST="imx6q-icore imx6dl-icore"
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_BLK is not set
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
@@ -33,7 +33,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_LIST="imx6q-icore-rqs imx6dl-icore-rqs"
CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
@@ -33,7 +33,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
# CONFIG_BLK is not set
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
@@ -32,7 +32,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_BLK is not set
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
@@ -33,7 +33,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
# CONFIG_BLK is not set
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
@@ -32,7 +32,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_BLK is not set
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
@@ -30,7 +30,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
@@ -42,7 +42,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
@@ -40,7 +40,7 @@ CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BLOCK_CACHE=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_I2C_MVTWSI=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
@@ -43,7 +43,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BLOCK_CACHE=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_I2C_MVTWSI=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
@@ -40,7 +40,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
-CONFIG_SYS_I2C_S3C24X0=y
+CONFIG_I2C_S3C24X0=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
@@ -59,7 +59,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_BLK is not set
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_I2C_MXC=y
CONFIG_PWRSEQ=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
@@ -19,7 +19,7 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_TEGRA186_BPMP_I2C=y
+CONFIG_I2C_TEGRA186_BPMP=y
CONFIG_DWC_ETH_QOS=y
CONFIG_E1000=y
CONFIG_RTL8169=y
@@ -19,7 +19,7 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_TEGRA186_BPMP_I2C=y
+CONFIG_I2C_TEGRA186_BPMP=y
CONFIG_DWC_ETH_QOS=y
CONFIG_E1000=y
CONFIG_RTL8169=y
@@ -44,7 +44,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
@@ -42,7 +42,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
@@ -47,7 +47,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
@@ -41,7 +41,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
@@ -31,7 +31,7 @@ CONFIG_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
CONFIG_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
@@ -34,7 +34,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
-CONFIG_SYS_I2C_S3C24X0=y
+CONFIG_I2C_S3C24X0=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
@@ -49,7 +49,7 @@ CONFIG_AT91_GENERIC_CLK=y
CONFIG_DM_GPIO=y
CONFIG_ATMEL_PIO4=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
@@ -50,7 +50,7 @@ CONFIG_AT91_GENERIC_CLK=y
CONFIG_DM_GPIO=y
CONFIG_ATMEL_PIO4=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
@@ -47,7 +47,7 @@ CONFIG_AT91_GENERIC_CLK=y
CONFIG_DM_GPIO=y
CONFIG_ATMEL_PIO4=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
@@ -47,7 +47,7 @@ CONFIG_AT91_H32MX=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
@@ -44,7 +44,7 @@ CONFIG_AT91_H32MX=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
@@ -46,7 +46,7 @@ CONFIG_AT91_H32MX=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
@@ -87,7 +87,7 @@ CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_SYS_I2C_SANDBOX=y
+CONFIG_I2C_SANDBOX=y
CONFIG_I2C_MUX=y
CONFIG_SPL_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
@@ -73,7 +73,7 @@ CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_SYS_I2C_SANDBOX=y
+CONFIG_I2C_SANDBOX=y
CONFIG_I2C_MUX=y
CONFIG_SPL_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
@@ -88,7 +88,7 @@ CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_SYS_I2C_SANDBOX=y
+CONFIG_I2C_SANDBOX=y
CONFIG_I2C_MUX=y
CONFIG_SPL_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
@@ -94,7 +94,7 @@ CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_SYS_I2C_SANDBOX=y
+CONFIG_I2C_SANDBOX=y
CONFIG_I2C_MUX=y
CONFIG_SPL_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
@@ -43,7 +43,7 @@ CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
@@ -43,7 +43,7 @@ CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
@@ -45,7 +45,7 @@ CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_PHY_MICREL=y
@@ -40,7 +40,7 @@ CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_PHY_MICREL=y
@@ -41,7 +41,7 @@ CONFIG_SPL_DM=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_PHY_MICREL=y
@@ -39,7 +39,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
@@ -43,7 +43,7 @@ CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_DM_ETH=y
@@ -43,7 +43,7 @@ CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
@@ -44,7 +44,7 @@ CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
@@ -43,7 +43,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -18,7 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
@@ -15,7 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
@@ -43,7 +43,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_INTEL=y
+CONFIG_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_E1000=y
CONFIG_USB_STORAGE=y
@@ -42,7 +42,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_INTEL=y
+CONFIG_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_E1000=y
CONFIG_USB_STORAGE=y
@@ -37,7 +37,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_OMAP24XX=y
+CONFIG_I2C_OMAP24XX=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SYS_NS16550=y
@@ -43,7 +43,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
@@ -38,7 +38,7 @@ CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_SYS_I2C_S3C24X0=y
+CONFIG_I2C_S3C24X0=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
@@ -37,7 +37,7 @@ CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_SYS_I2C_S3C24X0=y
+CONFIG_I2C_S3C24X0=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
@@ -37,7 +37,7 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
@@ -35,7 +35,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_I2C_DW=y
+CONFIG_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHY_MICREL=y
@@ -55,7 +55,7 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
@@ -46,7 +46,7 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
@@ -45,7 +45,7 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_CADENCE=y
# CONFIG_MMC is not set
CONFIG_DM_MMC=y
CONFIG_NAND=y
@@ -34,7 +34,7 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
@@ -33,7 +33,7 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
@@ -72,7 +72,7 @@ config DM_I2C_GPIO
bindings are supported.
Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
-config SYS_I2C_AT91
+config I2C_AT91
bool "Atmel I2C driver"
depends on DM_I2C && ARCH_AT91
help
@@ -82,21 +82,21 @@ config SYS_I2C_AT91
i2c-gpio driver unless your system can cope with this limitation.
Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
-config SYS_I2C_FSL
+config I2C_FSL
bool "Freescale I2C bus driver"
depends on DM_I2C
help
Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
MPC85xx processors.
-config SYS_I2C_CADENCE
+config I2C_CADENCE
tristate "Cadence I2C Controller"
depends on DM_I2C && (ARCH_ZYNQ || ARM64)
help
Say yes here to select Cadence I2C Host Controller. This controller is
e.g. used by Xilinx Zynq.
-config SYS_I2C_DW
+config I2C_DW
bool "Designware I2C Controller"
default n
help
@@ -104,9 +104,9 @@ config SYS_I2C_DW
controller is used in various SoCs, e.g. the ST SPEAr, Altera
SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
-config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
+config I2C_DW_ENABLE_STATUS_UNSUPPORTED
bool "DW I2C Enable Status Register not supported"
- depends on SYS_I2C_DW && (TARGET_SPEAR300 || TARGET_SPEAR310 || \
+ depends on I2C_DW && (TARGET_SPEAR300 || TARGET_SPEAR310 || \
TARGET_SPEAR320 || TARGET_SPEAR600 || TARGET_X600)
default y
help
@@ -114,7 +114,7 @@ config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
enable status register. This config option can be enabled in such
cases.
-config SYS_I2C_ASPEED
+config I2C_ASPEED
bool "Aspeed I2C Controller"
depends on DM_I2C && ARCH_ASPEED
help
@@ -123,7 +123,7 @@ config SYS_I2C_ASPEED
Only single master mode is supported and only byte-by-byte
synchronous reads and writes are supported, no Pool Buffers or DMA.
-config SYS_I2C_INTEL
+config I2C_INTEL
bool "Intel I2C/SMBUS driver"
depends on DM_I2C
help
@@ -132,12 +132,12 @@ config SYS_I2C_INTEL
the I2C API meaning that any I2C operations will immediately fail
for now.
-config SYS_I2C_IMX_LPI2C
+config I2C_IMX_LPI2C
bool "NXP i.MX LPI2C driver"
help
Add support for the NXP i.MX LPI2C driver.
-config SYS_I2C_MXC
+config I2C_MXC
bool "NXP i.MX I2C driver"
depends on MX6
help
@@ -145,13 +145,13 @@ config SYS_I2C_MXC
channels and operating on standard mode upto 100 kbits/s and fast
mode upto 400 kbits/s.
-config SYS_I2C_OMAP24XX
+config I2C_OMAP24XX
bool "TI OMAP2+ I2C driver"
depends on ARCH_OMAP2PLUS
help
Add support for the OMAP2+ I2C driver.
-config SYS_I2C_ROCKCHIP
+config I2C_ROCKCHIP
bool "Rockchip I2C driver"
depends on DM_I2C
help
@@ -160,7 +160,7 @@ config SYS_I2C_ROCKCHIP
have several I2C ports and all are provided, controled by the
device tree.
-config SYS_I2C_SANDBOX
+config I2C_SANDBOX
bool "Sandbox I2C driver"
depends on SANDBOX && DM_I2C
help
@@ -168,13 +168,13 @@ config SYS_I2C_SANDBOX
bus. Devices can be attached to the bus using the device tree
which specifies the driver to use. See sandbox.dts as an example.
-config SYS_I2C_S3C24X0
+config I2C_S3C24X0
bool "Samsung I2C driver"
depends on ARCH_EXYNOS4 && DM_I2C
help
Support for Samsung I2C controller as Samsung SoCs.
-config SYS_I2C_STM32F7
+config I2C_STM32F7
bool "STMicroelectronics STM32F7 I2C support"
depends on (STM32F7 || STM32H7) && DM_I2C
help
@@ -194,7 +194,7 @@ config SYS_I2C_STM32F7
_ Optional clock stretching
_ Software reset
-config SYS_I2C_UNIPHIER
+config I2C_UNIPHIER
bool "UniPhier I2C driver"
depends on ARCH_UNIPHIER && DM_I2C
default y
@@ -202,7 +202,7 @@ config SYS_I2C_UNIPHIER
Support for UniPhier I2C controller driver. This I2C controller
is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
-config SYS_I2C_UNIPHIER_F
+config I2C_UNIPHIER_F
bool "UniPhier FIFO-builtin I2C driver"
depends on ARCH_UNIPHIER && DM_I2C
default y
@@ -210,14 +210,14 @@ config SYS_I2C_UNIPHIER_F
Support for UniPhier FIFO-builtin I2C controller driver.
This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
-config SYS_I2C_MVTWSI
+config I2C_MVTWSI
bool "Marvell I2C driver"
depends on DM_I2C
help
Support for Marvell I2C controllers as used on the orion5x and
kirkwood SoC families.
-config TEGRA186_BPMP_I2C
+config I2C_TEGRA186_BPMP
bool "Enable Tegra186 BPMP-based I2C driver"
depends on TEGRA186_BPMP
help
@@ -227,7 +227,7 @@ config TEGRA186_BPMP_I2C
by the BPMP, and can only be accessed by the main CPU via IPC
requests to the BPMP. This driver covers the latter case.
-config SYS_I2C_BUS_MAX
+config I2C_BUS_MAX
int "Max I2C busses"
depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
default 2 if TI816X
@@ -15,33 +15,33 @@ obj-$(CONFIG_I2C_MV) += mv_i2c.o
obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
-obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
-obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
-obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
+obj-$(CONFIG_I2C_ASPEED) += ast_i2c.o
+obj-$(CONFIG_I2C_AT91) += at91_i2c.o
+obj-$(CONFIG_I2C_CADENCE) += i2c-cdns.o
obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o
-obj-$(CONFIG_SYS_I2C_DW) += designware_i2c.o
-obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
+obj-$(CONFIG_I2C_DW) += designware_i2c.o
+obj-$(CONFIG_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o
-obj-$(CONFIG_SYS_I2C_INTEL) += intel_i2c.o
-obj-$(CONFIG_SYS_I2C_IMX_LPI2C) += imx_lpi2c.o
+obj-$(CONFIG_I2C_INTEL) += intel_i2c.o
+obj-$(CONFIG_I2C_IMX_LPI2C) += imx_lpi2c.o
obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o
-obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
-obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
+obj-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
+obj-$(CONFIG_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
-obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
+obj-$(CONFIG_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
-obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o
-obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o
-obj-$(CONFIG_SYS_I2C_SANDBOX) += sandbox_i2c.o i2c-emul-uclass.o
+obj-$(CONFIG_I2C_ROCKCHIP) += rk_i2c.o
+obj-$(CONFIG_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o
+obj-$(CONFIG_I2C_SANDBOX) += sandbox_i2c.o i2c-emul-uclass.o
obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o
obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
-obj-$(CONFIG_SYS_I2C_STM32F7) += stm32f7_i2c.o
+obj-$(CONFIG_I2C_STM32F7) += stm32f7_i2c.o
obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
-obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o
-obj-$(CONFIG_SYS_I2C_UNIPHIER_F) += i2c-uniphier-f.o
+obj-$(CONFIG_I2C_UNIPHIER) += i2c-uniphier.o
+obj-$(CONFIG_I2C_UNIPHIER_F) += i2c-uniphier-f.o
obj-$(CONFIG_SYS_I2C_ZYNQ) += zynq_i2c.o
-obj-$(CONFIG_TEGRA186_BPMP_I2C) += tegra186_bpmp_i2c.o
+obj-$(CONFIG_I2C_TEGRA186_BPMP) += tegra186_bpmp_i2c.o
obj-$(CONFIG_I2C_MUX) += muxes/
@@ -343,11 +343,11 @@ static int _davinci_i2c_probe_chip(struct i2c_regs *i2c_base, uint8_t chip)
static struct i2c_regs *davinci_get_base(struct i2c_adapter *adap)
{
switch (adap->hwadapnr) {
-#if CONFIG_SYS_I2C_BUS_MAX >= 3
+#if CONFIG_I2C_BUS_MAX >= 3
case 2:
return (struct i2c_regs *)I2C2_BASE;
#endif
-#if CONFIG_SYS_I2C_BUS_MAX >= 2
+#if CONFIG_I2C_BUS_MAX >= 2
case 1:
return (struct i2c_regs *)I2C1_BASE;
#endif
@@ -412,7 +412,7 @@ U_BOOT_I2C_ADAP_COMPLETE(davinci_0, davinci_i2c_init, davinci_i2c_probe_chip,
CONFIG_SYS_DAVINCI_I2C_SLAVE,
0)
-#if CONFIG_SYS_I2C_BUS_MAX >= 2
+#if CONFIG_I2C_BUS_MAX >= 2
U_BOOT_I2C_ADAP_COMPLETE(davinci_1, davinci_i2c_init, davinci_i2c_probe_chip,
davinci_i2c_read, davinci_i2c_write,
davinci_i2c_setspeed,
@@ -421,7 +421,7 @@ U_BOOT_I2C_ADAP_COMPLETE(davinci_1, davinci_i2c_init, davinci_i2c_probe_chip,
1)
#endif
-#if CONFIG_SYS_I2C_BUS_MAX >= 3
+#if CONFIG_I2C_BUS_MAX >= 3
U_BOOT_I2C_ADAP_COMPLETE(davinci_2, davinci_i2c_init, davinci_i2c_probe_chip,
davinci_i2c_read, davinci_i2c_write,
davinci_i2c_setspeed,
@@ -36,7 +36,7 @@ struct dw_i2c {
struct dw_scl_sda_cfg *scl_sda_cfg;
};
-#ifdef CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
+#ifdef CONFIG_I2C_DW_ENABLE_STATUS_UNSUPPORTED
static void dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
{
u32 ena = enable ? IC_ENABLE_0B : 0;
@@ -396,15 +396,15 @@ static void __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
static struct i2c_regs *i2c_get_base(struct i2c_adapter *adap)
{
switch (adap->hwadapnr) {
-#if CONFIG_SYS_I2C_BUS_MAX >= 4
+#if CONFIG_I2C_BUS_MAX >= 4
case 3:
return (struct i2c_regs *)CONFIG_SYS_I2C_BASE3;
#endif
-#if CONFIG_SYS_I2C_BUS_MAX >= 3
+#if CONFIG_I2C_BUS_MAX >= 3
case 2:
return (struct i2c_regs *)CONFIG_SYS_I2C_BASE2;
#endif
-#if CONFIG_SYS_I2C_BUS_MAX >= 2
+#if CONFIG_I2C_BUS_MAX >= 2
case 1:
return (struct i2c_regs *)CONFIG_SYS_I2C_BASE1;
#endif
@@ -462,19 +462,19 @@ U_BOOT_I2C_ADAP_COMPLETE(dw_0, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
dw_i2c_write, dw_i2c_set_bus_speed,
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
-#if CONFIG_SYS_I2C_BUS_MAX >= 2
+#if CONFIG_I2C_BUS_MAX >= 2
U_BOOT_I2C_ADAP_COMPLETE(dw_1, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
dw_i2c_write, dw_i2c_set_bus_speed,
CONFIG_SYS_I2C_SPEED1, CONFIG_SYS_I2C_SLAVE1, 1)
#endif
-#if CONFIG_SYS_I2C_BUS_MAX >= 3
+#if CONFIG_I2C_BUS_MAX >= 3
U_BOOT_I2C_ADAP_COMPLETE(dw_2, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
dw_i2c_write, dw_i2c_set_bus_speed,
CONFIG_SYS_I2C_SPEED2, CONFIG_SYS_I2C_SLAVE2, 2)
#endif
-#if CONFIG_SYS_I2C_BUS_MAX >= 4
+#if CONFIG_I2C_BUS_MAX >= 4
U_BOOT_I2C_ADAP_COMPLETE(dw_3, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
dw_i2c_write, dw_i2c_set_bus_speed,
CONFIG_SYS_I2C_SPEED3, CONFIG_SYS_I2C_SLAVE3, 3)
@@ -701,7 +701,7 @@ static u32 mxc_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)
/*
* Register mxc i2c adapters
*/
-#ifdef CONFIG_SYS_I2C_MXC_I2C1
+#ifdef CONFIG_I2C_MXC_I2C1
U_BOOT_I2C_ADAP_COMPLETE(mxc0, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
@@ -709,7 +709,7 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc0, mxc_i2c_init, mxc_i2c_probe,
CONFIG_SYS_MXC_I2C1_SLAVE, 0)
#endif
-#ifdef CONFIG_SYS_I2C_MXC_I2C2
+#ifdef CONFIG_I2C_MXC_I2C2
U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
@@ -717,7 +717,7 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe,
CONFIG_SYS_MXC_I2C2_SLAVE, 1)
#endif
-#ifdef CONFIG_SYS_I2C_MXC_I2C3
+#ifdef CONFIG_I2C_MXC_I2C3
U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
@@ -725,7 +725,7 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
CONFIG_SYS_MXC_I2C3_SLAVE, 2)
#endif
-#ifdef CONFIG_SYS_I2C_MXC_I2C4
+#ifdef CONFIG_I2C_MXC_I2C4
U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
@@ -706,15 +706,15 @@ static struct i2c *omap24_get_base(struct i2c_adapter *adap)
case 1:
return (struct i2c *)I2C_BASE2;
break;
-#if (CONFIG_SYS_I2C_BUS_MAX > 2)
+#if (CONFIG_I2C_BUS_MAX > 2)
case 2:
return (struct i2c *)I2C_BASE3;
break;
-#if (CONFIG_SYS_I2C_BUS_MAX > 3)
+#if (CONFIG_I2C_BUS_MAX > 3)
case 3:
return (struct i2c *)I2C_BASE4;
break;
-#if (CONFIG_SYS_I2C_BUS_MAX > 4)
+#if (CONFIG_I2C_BUS_MAX > 4)
case 4:
return (struct i2c *)I2C_BASE5;
break;
@@ -795,7 +795,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe,
CONFIG_SYS_OMAP24_I2C_SPEED1,
CONFIG_SYS_OMAP24_I2C_SLAVE1,
1)
-#if (CONFIG_SYS_I2C_BUS_MAX > 2)
+#if (CONFIG_I2C_BUS_MAX > 2)
#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED2)
#define CONFIG_SYS_OMAP24_I2C_SPEED2 CONFIG_SYS_OMAP24_I2C_SPEED
#endif
@@ -808,7 +808,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
CONFIG_SYS_OMAP24_I2C_SPEED2,
CONFIG_SYS_OMAP24_I2C_SLAVE2,
2)
-#if (CONFIG_SYS_I2C_BUS_MAX > 3)
+#if (CONFIG_I2C_BUS_MAX > 3)
#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED3)
#define CONFIG_SYS_OMAP24_I2C_SPEED3 CONFIG_SYS_OMAP24_I2C_SPEED
#endif
@@ -821,7 +821,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
CONFIG_SYS_OMAP24_I2C_SPEED3,
CONFIG_SYS_OMAP24_I2C_SLAVE3,
3)
-#if (CONFIG_SYS_I2C_BUS_MAX > 4)
+#if (CONFIG_I2C_BUS_MAX > 4)
#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED4)
#define CONFIG_SYS_OMAP24_I2C_SPEED4 CONFIG_SYS_OMAP24_I2C_SPEED
#endif
@@ -20,10 +20,10 @@
#include <i2c.h>
#include "s3c24x0_i2c.h"
-#ifndef CONFIG_SYS_I2C_S3C24X0_SLAVE
-#define SYS_I2C_S3C24X0_SLAVE_ADDR 0
+#ifndef CONFIG_I2C_S3C24X0_SLAVE
+#define I2C_S3C24X0_SLAVE_ADDR 0
#else
-#define SYS_I2C_S3C24X0_SLAVE_ADDR CONFIG_SYS_I2C_S3C24X0_SLAVE
+#define I2C_S3C24X0_SLAVE_ADDR CONFIG_I2C_S3C24X0_SLAVE
#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -89,7 +89,7 @@ static int s3c24x0_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)
i2c_bus->clock_frequency = speed;
i2c_ch_init(i2c_bus->regs, i2c_bus->clock_frequency,
- SYS_I2C_S3C24X0_SLAVE_ADDR);
+ I2C_S3C24X0_SLAVE_ADDR);
return 0;
}
@@ -83,7 +83,7 @@ typedef struct global_data {
#if defined(CONFIG_SYS_I2C)
int cur_i2c_bus; /* current used i2c bus */
#endif
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_I2C_MXC
void *srdata[10];
#endif
unsigned int timebase_h;
@@ -462,7 +462,7 @@ unsigned long get_board_ddr_clk(void);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
+#define CONFIG_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 400000 /* I2C speed in Hz */
@@ -221,7 +221,7 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -396,7 +396,7 @@ combinations. this should be removed later
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR + 0x4800)
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400800 /* I2C speed and slave address*/
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 400800 /* I2C speed and slave address*/
@@ -358,7 +358,7 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
@@ -49,7 +49,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
@@ -99,7 +99,7 @@
/* I2c */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
@@ -83,7 +83,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000280
@@ -79,7 +79,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
@@ -66,7 +66,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
@@ -58,7 +58,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
@@ -58,7 +58,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
@@ -112,7 +112,7 @@
/* I2c */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
@@ -139,7 +139,7 @@
/* I2c */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
@@ -76,7 +76,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00008F00
@@ -73,7 +73,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00008F00
@@ -313,7 +313,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -367,7 +367,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -299,7 +299,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -223,7 +223,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -304,7 +304,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -323,7 +323,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -81,7 +81,7 @@
/* I2C */
#ifdef CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -316,7 +316,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -342,7 +342,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -365,7 +365,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -220,7 +220,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -246,7 +246,7 @@ extern unsigned long get_clock_freq(void);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -193,7 +193,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100
@@ -318,7 +318,7 @@ extern unsigned long get_clock_freq(void);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -244,7 +244,7 @@ extern unsigned long get_clock_freq(void);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -215,7 +215,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -224,7 +224,7 @@ extern unsigned long get_clock_freq(void);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -236,7 +236,7 @@ extern unsigned long get_clock_freq(void);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
@@ -359,7 +359,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -221,7 +221,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -262,7 +262,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100
@@ -562,7 +562,7 @@ extern unsigned long get_sdram_size(void);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -387,7 +387,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -163,7 +163,7 @@ extern unsigned long get_clock_freq(void);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -313,7 +313,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
@@ -493,7 +493,7 @@ unsigned long get_board_ddr_clk(void);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
+#define CONFIG_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
@@ -499,7 +499,7 @@ unsigned long get_board_ddr_clk(void);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
+#define CONFIG_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
@@ -402,7 +402,7 @@ unsigned long get_board_ddr_clk(void);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
+#define CONFIG_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SPEED 50000
#define CONFIG_SYS_FSL_I2C3_SPEED 50000
@@ -507,7 +507,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
+#define CONFIG_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
#define CONFIG_SYS_FSL_I2C3_SPEED 400000
@@ -440,7 +440,7 @@ unsigned long get_board_ddr_clk(void);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
@@ -388,7 +388,7 @@ unsigned long get_board_ddr_clk(void);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
@@ -183,7 +183,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
@@ -169,7 +169,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -299,7 +299,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -269,10 +269,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
+#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
+#define CONFIG_I2C_MXC_I2C1
+#define CONFIG_I2C_MXC_I2C2
+#define CONFIG_I2C_MXC_I2C3
#endif /* __ADVANTECH_DMSBA16_CONFIG_H */
@@ -46,10 +46,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* OCOTP Configs */
@@ -256,9 +256,9 @@
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
#define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
@@ -167,10 +167,10 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
@@ -37,7 +37,7 @@
"ubifsload ${fit_addr_r} /boot/system.itb; " \
"imi ${fit_addr_r}\0 "
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
+#define CONFIG_I2C_MXC_I2C4 /* enable I2C bus 4 */
#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15)
#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(1, 0)
@@ -37,7 +37,7 @@
"ubifsload ${fit_addr_r} /boot/system.itb; " \
"imi ${fit_addr_r}\0 " \
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
+#define CONFIG_I2C_MXC_I2C4 /* enable I2C bus 4 */
#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15)
#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(1, 0)
@@ -68,7 +68,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
@@ -48,10 +48,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -48,8 +48,8 @@
/* I2C configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C2 /* Enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#define SYS_I2C_BUS_SOM 0
@@ -27,7 +27,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
@@ -202,10 +202,10 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MXC_I2C3_SPEED 400000
@@ -44,10 +44,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* OCOTP Configs */
@@ -47,7 +47,7 @@
#undef CONFIG_BOOTM_RTEMS
/* I2C configs */
-#define CONFIG_SYS_I2C_MXC
+#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_IPADDR 192.168.10.2
@@ -172,7 +172,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -321,7 +321,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
@@ -208,7 +208,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed and slave address */
@@ -26,7 +26,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
@@ -27,7 +27,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
@@ -24,7 +24,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
@@ -69,10 +69,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */
@@ -26,7 +26,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
@@ -222,7 +222,7 @@
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
@@ -175,7 +175,7 @@
*/
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
@@ -33,10 +33,10 @@
/* I2C config */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -27,10 +27,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* USB Configs */
@@ -104,9 +104,9 @@
#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
/* I2C */
-#define CONFIG_SYS_I2C_S3C24X0
-#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* 100 Kbps */
-#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x0
+#define CONFIG_I2C_S3C24X0
+#define CONFIG_I2C_S3C24X0_SPEED 100000 /* 100 Kbps */
+#define CONFIG_I2C_S3C24X0_SLAVE 0x0
/* SPI */
#ifdef CONFIG_SPI_FLASH
@@ -41,10 +41,10 @@
* Hardware drivers
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
#define CONFIG_MXC_SPI
@@ -293,11 +293,11 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
+#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
+#define CONFIG_I2C_MXC_I2C1
+#define CONFIG_I2C_MXC_I2C2
+#define CONFIG_I2C_MXC_I2C3
#define CONFIG_SYS_NUM_I2C_BUSES 9
#define CONFIG_SYS_I2C_MAX_HOPS 1
@@ -83,10 +83,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_GSC 0
#define CONFIG_I2C_EDID
@@ -294,7 +294,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -275,7 +275,7 @@
* I2C setup
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100
@@ -32,10 +32,10 @@
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
#define CONFIG_MXC_UART
@@ -198,7 +198,7 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_NUM_I2C_BUSES 4
#define CONFIG_SYS_I2C_MAX_HOPS 1
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 200000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -244,7 +244,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_I2C_SPEED 100000 /* deblocking */
#define CONFIG_SYS_NUM_I2C_BUSES 3
#define CONFIG_SYS_I2C_MAX_HOPS 1
-#define CONFIG_SYS_I2C_FSL /* Use FSL I2C driver */
+#define CONFIG_I2C_FSL /* Use FSL I2C driver */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_FSL_I2C_SPEED 400000
@@ -71,9 +71,9 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
@@ -116,10 +116,10 @@
*/
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* EEPROM */
#define CONFIG_ID_EEPROM
@@ -360,10 +360,10 @@ unsigned long get_board_ddr_clk(void);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
/*
* I2C bus multiplexer
@@ -259,10 +259,10 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* EEPROM */
#define CONFIG_ID_EEPROM
@@ -152,11 +152,11 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC_I2C4
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1
+#define CONFIG_I2C_MXC_I2C2
+#define CONFIG_I2C_MXC_I2C3
+#define CONFIG_I2C_MXC_I2C4
/* PCIe */
#ifndef SPL_NO_PCIE
@@ -130,11 +130,11 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC_I2C4
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1
+#define CONFIG_I2C_MXC_I2C2
+#define CONFIG_I2C_MXC_I2C3
+#define CONFIG_I2C_MXC_I2C4
/* PCIe */
#define CONFIG_PCIE1 /* PCIE controller 1 */
@@ -53,11 +53,11 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC_I2C4 /* enable I2C bus 4 */
/* Serial Port */
#define CONFIG_CONS_INDEX 1
@@ -85,11 +85,11 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC_I2C4 /* enable I2C bus 4 */
/* Serial Port */
#define CONFIG_CONS_INDEX 1
@@ -121,10 +121,10 @@
*/
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
#endif
@@ -26,7 +26,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
@@ -53,9 +53,9 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configuration */
@@ -302,7 +302,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
@@ -91,9 +91,9 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
/* RTC */
#define CONFIG_RTC_IMXDI
@@ -37,10 +37,10 @@
* Hardware drivers
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
@@ -39,10 +39,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* MMC Configs */
#define CONFIG_FSL_ESDHC
@@ -30,10 +30,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* PMIC Configs */
#define CONFIG_POWER
@@ -49,10 +49,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* PMIC Controller */
#define CONFIG_POWER
@@ -30,10 +30,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* MMC Configs */
#define CONFIG_FSL_ESDHC
@@ -59,10 +59,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* NAND stuff */
@@ -45,10 +45,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -27,10 +27,10 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
/* I2C Configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_FEC_MXC
@@ -25,10 +25,10 @@
/* I2C Configs */
#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#endif
@@ -112,10 +112,10 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
/* I2C Configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* NAND stuff */
@@ -141,10 +141,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -42,9 +42,9 @@
/* I2C configs */
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC only for 9X9 EVK */
@@ -46,9 +46,9 @@
/* I2C configs */
#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#endif
@@ -38,7 +38,7 @@
#undef CONFIG_BOOTM_RTEMS
/* I2C configs */
-#define CONFIG_SYS_I2C_MXC
+#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
@@ -34,10 +34,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_EDID
@@ -75,10 +75,10 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
@@ -34,10 +34,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* OCOTP Configs */
@@ -605,7 +605,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -213,7 +213,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
+#define CONFIG_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C spd and slave address */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -72,8 +72,8 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC
+#define CONFIG_I2C_MXC_I2C3
+#define CONFIG_I2C_MXC
/* RTC (actually an RV-4162 but M41T62-compatible) */
#define CONFIG_RTC_M41T62
@@ -52,8 +52,8 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#ifndef CONFIG_SPL_BUILD
@@ -49,8 +49,8 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 0 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 0 */
#define CONFIG_SYS_I2C_SPEED 100000
#ifndef CONFIG_SPL_BUILD
@@ -128,8 +128,8 @@
/* I2C configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -106,11 +106,11 @@
/* I2C configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC_I2C4
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1
+#define CONFIG_I2C_MXC_I2C2
+#define CONFIG_I2C_MXC_I2C3
+#define CONFIG_I2C_MXC_I2C4
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -25,10 +25,10 @@
/* I2C config */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* MMC config */
@@ -278,7 +278,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -410,7 +410,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -250,7 +250,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100
@@ -194,7 +194,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 102124
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -295,7 +295,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -215,7 +215,7 @@
#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SPEED 400000
@@ -141,7 +141,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
@@ -115,10 +115,10 @@
/* I2C */
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_EDID
#endif
@@ -32,7 +32,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
@@ -30,10 +30,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */
@@ -50,10 +50,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 100000
@@ -32,7 +32,7 @@
#define CONFIG_I2C_MUX
#define CONFIG_I2C_MUX_PCA954x
#define CONFIG_SPL_I2C_MUX
-#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI
/* Watchdog support */
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
@@ -90,8 +90,8 @@
/* I2C configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -44,9 +44,9 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
/* Fuse */
#define CONFIG_FSL_IIM
@@ -70,9 +70,9 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_SPD_BUS_NUM 0
@@ -51,9 +51,9 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -212,7 +212,7 @@
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -39,10 +39,10 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -71,9 +71,9 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -100,8 +100,8 @@
/* I2C configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
@@ -38,10 +38,10 @@
* Hardware drivers
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
@@ -209,7 +209,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 100000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -182,7 +182,7 @@
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -206,7 +206,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -210,7 +210,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
* I2C
*/
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
+#define CONFIG_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
@@ -26,10 +26,10 @@
/* I2C configs */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
+#define CONFIG_I2C_MXC
+#define CONFIG_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_I2C_MXC_I2C4 /* enable I2C bus 4 */
#define CONFIG_SYS_I2C_SPEED 100000
/* Miscellaneous configurable options */
@@ -3429,10 +3429,10 @@ CONFIG_SYS_I2C_MAC2_DATA_ADDR
CONFIG_SYS_I2C_MAC_OFFSET
CONFIG_SYS_I2C_MAX1237_ADDR
CONFIG_SYS_I2C_MAX_HOPS
-CONFIG_SYS_I2C_MXC_I2C1
-CONFIG_SYS_I2C_MXC_I2C2
-CONFIG_SYS_I2C_MXC_I2C3
-CONFIG_SYS_I2C_MXC_I2C4
+CONFIG_I2C_MXC_I2C1
+CONFIG_I2C_MXC_I2C2
+CONFIG_I2C_MXC_I2C3
+CONFIG_I2C_MXC_I2C4
CONFIG_SYS_I2C_NCT72_ADDR
CONFIG_SYS_I2C_NOPROBES
CONFIG_SYS_I2C_OFFSET
@@ -3455,8 +3455,8 @@ CONFIG_SYS_I2C_PXA
CONFIG_SYS_I2C_QIXIS_ADDR
CONFIG_SYS_I2C_RCAR
CONFIG_SYS_I2C_RTC_ADDR
-CONFIG_SYS_I2C_S3C24X0_SLAVE
-CONFIG_SYS_I2C_S3C24X0_SPEED
+CONFIG_I2C_S3C24X0_SLAVE
+CONFIG_I2C_S3C24X0_SPEED
CONFIG_SYS_I2C_SH
CONFIG_SYS_I2C_SH_BASE0
CONFIG_SYS_I2C_SH_BASE1
Historically, U-Boot added CONFIG_SYS_ prefix to user-unconfigurable options. Somehow, this rule was not observed in some places, and getting meaningless with Kconfig introduction where platforms can "select" to force options. Actually, I2C drivers are generally configurable. Convert the options in drivers/i2c/Kconfig. This commit was generated by the following command. find . -name .git -prune -o -type f -print | \ xargs sed -i -e ' s/SYS_I2C_AT91/I2C_AT91/g s/SYS_I2C_FSL/I2C_FSL/g s/SYS_I2C_CADENCE/I2C_CADENCE/g s/SYS_I2C_DW/I2C_DW/g s/SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED/I2C_DW_ENABLE_STATUS_UNSUPPORTED/g s/SYS_I2C_ASPEED/I2C_ASPEED/g s/SYS_I2C_INTEL/I2C_INTEL/g s/SYS_I2C_IMX_LPI2C/I2C_IMX_LPI2C/g s/SYS_I2C_MXC/I2C_MXC/g s/SYS_I2C_OMAP24XX/I2C_OMAP24XX/g s/SYS_I2C_ROCKCHIP/I2C_ROCKCHIP/g s/SYS_I2C_SANDBOX/I2C_SANDBOX/g s/SYS_I2C_S3C24X0/I2C_S3C24X0/g s/SYS_I2C_STM32F7/I2C_STM32F7/g s/SYS_I2C_UNIPHIER/I2C_UNIPHIER/g s/SYS_I2C_UNIPHIER_F/I2C_UNIPHIER_F/g s/SYS_I2C_MVTWSI/I2C_MVTWSI/g s/TEGRA186_BPMP_I2C/I2C_TEGRA186_BPMP/g s/SYS_I2C_BUS_MAX/I2C_BUS_MAX/g ' Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- README | 16 ++++----- arch/arm/cpu/arm926ejs/spear/cpu.c | 2 +- arch/arm/include/asm/arch-mx7/clock.h | 2 +- arch/arm/mach-imx/Makefile | 4 +-- arch/arm/mach-imx/mx5/clock.c | 2 +- arch/arm/mach-imx/mx6/clock.c | 2 +- arch/arm/mach-imx/mx7/clock.c | 2 +- arch/arm/mach-kirkwood/include/mach/config.h | 2 +- arch/arm/mach-omap2/Kconfig | 10 +++--- arch/arm/mach-omap2/omap3/clock.c | 2 +- arch/m68k/cpu/mcf5227x/cpu_init.c | 2 +- arch/m68k/cpu/mcf5227x/speed.c | 2 +- arch/m68k/cpu/mcf523x/cpu_init.c | 2 +- arch/m68k/cpu/mcf523x/speed.c | 2 +- arch/m68k/cpu/mcf52x2/cpu_init.c | 4 +-- arch/m68k/cpu/mcf52x2/speed.c | 2 +- arch/m68k/cpu/mcf532x/cpu_init.c | 4 +-- arch/m68k/cpu/mcf532x/speed.c | 2 +- arch/m68k/cpu/mcf5445x/speed.c | 2 +- arch/m68k/cpu/mcf547x_8x/cpu_init.c | 2 +- arch/m68k/cpu/mcf547x_8x/speed.c | 2 +- arch/m68k/include/asm/global_data.h | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 ++-- board/compulab/cm_fx6/cm_fx6.c | 2 +- board/compulab/cm_t35/cm_t35.c | 2 +- board/dhelectronics/dh_imx6/dh_imx6.c | 2 +- board/freescale/m52277evb/README | 2 +- board/freescale/m53017evb/README | 2 +- board/freescale/m5373evb/README | 2 +- board/freescale/m547xevb/README | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 +-- board/logicpd/am3517evm/am3517evm.c | 2 +- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/technexion/pico-imx6ul/pico-imx6ul.c | 4 +-- board/technexion/pico-imx7d/pico-imx7d.c | 4 +-- board/ti/am3517crane/am3517crane.c | 2 +- board/ti/evm/evm.c | 2 +- board/udoo/neo/neo.c | 4 +-- board/warp7/warp7.c | 4 +-- configs/chromebit_mickey_defconfig | 2 +- configs/chromebook_jerry_defconfig | 2 +- configs/chromebook_link64_defconfig | 2 +- configs/chromebook_link_defconfig | 2 +- configs/chromebook_minnie_defconfig | 2 +- ...conga-qeval20-qa3-e3845-internal-uart_defconfig | 2 +- configs/conga-qeval20-qa3-e3845_defconfig | 2 +- configs/controlcenterdc_defconfig | 2 +- configs/db-88f6820-amc_defconfig | 2 +- configs/evb-ast2500_defconfig | 2 +- configs/evb-rk3036_defconfig | 2 +- configs/evb-rk3229_defconfig | 2 +- configs/evb-rk3288_defconfig | 2 +- configs/evb-rk3328_defconfig | 2 +- configs/evb-rk3399_defconfig | 2 +- configs/evb-rv1108_defconfig | 2 +- configs/fennec-rk3288_defconfig | 2 +- configs/firefly-rk3288_defconfig | 2 +- configs/firefly-rk3399_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_mmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/kylin-rk3036_defconfig | 2 +- configs/miqi-rk3288_defconfig | 2 +- configs/mvebu_db_armada8k_defconfig | 2 +- configs/mvebu_mcbin-88f8040_defconfig | 2 +- configs/odroid_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/p2771-0000-000_defconfig | 2 +- configs/p2771-0000-500_defconfig | 2 +- configs/phycore-rk3288_defconfig | 2 +- configs/popmetal-rk3288_defconfig | 2 +- configs/puma-rk3399_defconfig | 2 +- configs/rock2_defconfig | 2 +- configs/rock_defconfig | 2 +- configs/s5pc210_universal_defconfig | 2 +- configs/sama5d27_som1_ek_mmc_defconfig | 2 +- configs/sama5d2_xplained_mmc_defconfig | 2 +- configs/sama5d2_xplained_spiflash_defconfig | 2 +- configs/sama5d4_xplained_mmc_defconfig | 2 +- configs/sama5d4_xplained_nandflash_defconfig | 2 +- configs/sama5d4_xplained_spiflash_defconfig | 2 +- configs/sandbox_defconfig | 2 +- configs/sandbox_flattree_defconfig | 2 +- configs/sandbox_noblk_defconfig | 2 +- configs/sandbox_spl_defconfig | 2 +- configs/socfpga_arria5_defconfig | 2 +- configs/socfpga_cyclone5_defconfig | 2 +- configs/socfpga_de0_nano_soc_defconfig | 2 +- configs/socfpga_de10_nano_defconfig | 2 +- configs/socfpga_de1_soc_defconfig | 2 +- configs/socfpga_is1_defconfig | 2 +- configs/socfpga_mcvevk_defconfig | 2 +- configs/socfpga_sockit_defconfig | 2 +- configs/socfpga_socrates_defconfig | 2 +- configs/socfpga_sr1500_defconfig | 2 +- configs/spear300_defconfig | 2 +- configs/spear300_nand_defconfig | 2 +- configs/spear300_usbtty_defconfig | 2 +- configs/spear300_usbtty_nand_defconfig | 2 +- configs/spear310_defconfig | 2 +- configs/spear310_nand_defconfig | 2 +- configs/spear310_pnor_defconfig | 2 +- configs/spear310_usbtty_defconfig | 2 +- configs/spear310_usbtty_nand_defconfig | 2 +- configs/spear310_usbtty_pnor_defconfig | 2 +- configs/spear320_defconfig | 2 +- configs/spear320_nand_defconfig | 2 +- configs/spear320_pnor_defconfig | 2 +- configs/spear320_usbtty_defconfig | 2 +- configs/spear320_usbtty_nand_defconfig | 2 +- configs/spear320_usbtty_pnor_defconfig | 2 +- configs/spear600_defconfig | 2 +- configs/spear600_nand_defconfig | 2 +- configs/spear600_usbtty_defconfig | 2 +- configs/spear600_usbtty_nand_defconfig | 2 +- ...eadorable-x86-conga-qa3-e3845-pcie-x4_defconfig | 2 +- configs/theadorable-x86-conga-qa3-e3845_defconfig | 2 +- configs/ti816x_evm_defconfig | 2 +- configs/tinker-rk3288_defconfig | 2 +- configs/trats2_defconfig | 2 +- configs/trats_defconfig | 2 +- configs/vyasa-rk3288_defconfig | 2 +- configs/x600_defconfig | 2 +- configs/xilinx_zynqmp_ep_defconfig | 2 +- configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 +- configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 2 +- configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 +- configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 2 +- drivers/i2c/Kconfig | 40 +++++++++++----------- drivers/i2c/Makefile | 34 +++++++++--------- drivers/i2c/davinci_i2c.c | 8 ++--- drivers/i2c/designware_i2c.c | 14 ++++---- drivers/i2c/mxc_i2c.c | 8 ++--- drivers/i2c/omap24xx_i2c.c | 12 +++---- drivers/i2c/s3c24x0_i2c.c | 8 ++--- include/asm-generic/global_data.h | 2 +- include/configs/B4860QDS.h | 2 +- include/configs/BSC9131RDB.h | 2 +- include/configs/BSC9132QDS.h | 2 +- include/configs/C29XPCIE.h | 2 +- include/configs/M5208EVBE.h | 2 +- include/configs/M52277EVB.h | 2 +- include/configs/M5253DEMO.h | 2 +- include/configs/M5275EVB.h | 2 +- include/configs/M53017EVB.h | 2 +- include/configs/M5329EVB.h | 2 +- include/configs/M5373EVB.h | 2 +- include/configs/M54451EVB.h | 2 +- include/configs/M54455EVB.h | 2 +- include/configs/M5475EVB.h | 2 +- include/configs/M5485EVB.h | 2 +- include/configs/MPC8308RDB.h | 2 +- include/configs/MPC8313ERDB.h | 2 +- include/configs/MPC8315ERDB.h | 2 +- include/configs/MPC8323ERDB.h | 2 +- include/configs/MPC832XEMDS.h | 2 +- include/configs/MPC8349EMDS.h | 2 +- include/configs/MPC8349ITX.h | 2 +- include/configs/MPC837XEMDS.h | 2 +- include/configs/MPC837XERDB.h | 2 +- include/configs/MPC8536DS.h | 2 +- include/configs/MPC8540ADS.h | 2 +- include/configs/MPC8541CDS.h | 2 +- include/configs/MPC8544DS.h | 2 +- include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8555CDS.h | 2 +- include/configs/MPC8560ADS.h | 2 +- include/configs/MPC8568MDS.h | 2 +- include/configs/MPC8569MDS.h | 2 +- include/configs/MPC8572DS.h | 2 +- include/configs/MPC8610HPCD.h | 2 +- include/configs/MPC8641HPCN.h | 2 +- include/configs/P1010RDB.h | 2 +- include/configs/P1022DS.h | 2 +- include/configs/P1023RDB.h | 2 +- include/configs/P2041RDB.h | 2 +- include/configs/T102xQDS.h | 2 +- include/configs/T102xRDB.h | 2 +- include/configs/T1040QDS.h | 2 +- include/configs/T104xRDB.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/T4240RDB.h | 2 +- include/configs/TQM834x.h | 2 +- include/configs/UCP1020.h | 2 +- include/configs/advantech_dms-ba16.h | 8 ++--- include/configs/apalis_imx6.h | 8 ++--- include/configs/apf27.h | 6 ++-- include/configs/aristainetos-common.h | 8 ++--- include/configs/aristainetos2.h | 2 +- include/configs/aristainetos2b.h | 2 +- include/configs/astro_mcf5373l.h | 2 +- include/configs/cgtqmx6eval.h | 8 ++--- include/configs/cl-som-imx7.h | 4 +-- include/configs/clearfog.h | 2 +- include/configs/cm_fx6.h | 8 ++--- include/configs/colibri_imx6.h | 8 ++--- include/configs/colibri_imx7.h | 2 +- include/configs/controlcenterd.h | 2 +- include/configs/corenet_ds.h | 2 +- include/configs/cyrus.h | 2 +- include/configs/db-88f6720.h | 2 +- include/configs/db-88f6820-gp.h | 2 +- include/configs/db-mv784mp-gp.h | 2 +- include/configs/dh_imx6.h | 8 ++--- include/configs/ds414.h | 2 +- include/configs/eb_cpu5282.h | 2 +- include/configs/edminiv2.h | 2 +- include/configs/el6x_common.h | 8 ++--- include/configs/embestmx6boards.h | 8 ++--- include/configs/exynos5-common.h | 6 ++-- include/configs/flea3.h | 8 ++--- include/configs/ge_bx50v3.h | 8 ++--- include/configs/gw_ventana.h | 8 ++--- include/configs/hrcon.h | 2 +- include/configs/ids8313.h | 2 +- include/configs/imx31_phycore.h | 8 ++--- include/configs/km/km83xx-common.h | 2 +- include/configs/km/kmp204x-common.h | 2 +- include/configs/ls1012a_common.h | 6 ++-- include/configs/ls1021aiot.h | 8 ++--- include/configs/ls1021aqds.h | 8 ++--- include/configs/ls1021atwr.h | 8 ++--- include/configs/ls1043a_common.h | 10 +++--- include/configs/ls1046a_common.h | 10 +++--- include/configs/ls1088a_common.h | 10 +++--- include/configs/ls2080a_common.h | 10 +++--- include/configs/m53evk.h | 8 ++--- include/configs/maxbcm.h | 2 +- include/configs/mccmon6.h | 6 ++-- include/configs/mpc8308_p1m.h | 2 +- include/configs/mx25pdk.h | 6 ++-- include/configs/mx35pdk.h | 8 ++--- include/configs/mx53ard.h | 8 ++--- include/configs/mx53evk.h | 8 ++--- include/configs/mx53loco.h | 8 ++--- include/configs/mx53smd.h | 8 ++--- include/configs/mx6sabreauto.h | 8 ++--- include/configs/mx6sabresd.h | 8 ++--- include/configs/mx6slevk.h | 8 ++--- include/configs/mx6sllevk.h | 8 ++--- include/configs/mx6sxsabreauto.h | 8 ++--- include/configs/mx6sxsabresd.h | 8 ++--- include/configs/mx6ul_14x14_evk.h | 6 ++-- include/configs/mx6ullevk.h | 6 ++-- include/configs/mx7dsabresd.h | 2 +- include/configs/nitrogen6x.h | 8 ++--- include/configs/novena.h | 8 ++--- include/configs/ot1200.h | 8 ++--- include/configs/p1_p2_rdb_pc.h | 2 +- include/configs/p1_twr.h | 2 +- include/configs/pcm052.h | 4 +-- include/configs/pcm058.h | 4 +-- include/configs/pfla02.h | 4 +-- include/configs/pico-imx6ul.h | 4 +-- include/configs/pico-imx7d.h | 10 +++--- include/configs/platinum.h | 8 ++--- include/configs/sbc8349.h | 2 +- include/configs/sbc8548.h | 2 +- include/configs/sbc8641d.h | 2 +- include/configs/socrates.h | 2 +- include/configs/strider.h | 2 +- include/configs/sunxi-common.h | 2 +- include/configs/t4qds.h | 2 +- include/configs/tbs2910.h | 8 ++--- include/configs/theadorable.h | 2 +- include/configs/titanium.h | 8 ++--- include/configs/tqma6.h | 8 ++--- include/configs/turris_omnia.h | 2 +- include/configs/udoo_neo.h | 4 +-- include/configs/usbarmory.h | 6 ++-- include/configs/vf610twr.h | 6 ++-- include/configs/vining_2000.h | 6 ++-- include/configs/vme8349.h | 2 +- include/configs/wandboard.h | 8 ++--- include/configs/warp.h | 6 ++-- include/configs/warp7.h | 4 +-- include/configs/woodburn_common.h | 8 ++--- include/configs/xpedite517x.h | 2 +- include/configs/xpedite520x.h | 2 +- include/configs/xpedite537x.h | 2 +- include/configs/xpedite550x.h | 2 +- include/configs/xpress.h | 8 ++--- scripts/config_whitelist.txt | 12 +++---- 292 files changed, 536 insertions(+), 536 deletions(-)