diff mbox series

[1/2] clk: hi6220: change watchdog clock source

Message ID 1503993518-24428-1-git-send-email-leo.yan@linaro.org
State Accepted
Commit 9fa7231b1979f792b2cbc395c52e197158494948
Headers show
Series [1/2] clk: hi6220: change watchdog clock source | expand

Commit Message

Leo Yan Aug. 29, 2017, 7:58 a.m. UTC
The old code uses tcxo (19.2MHz) as watchdog clock but actually the
watchdog uses 32K clock, as result the watchdog timeout cannot be set
correctly and delay long time to reset SoC.

So this patch is to use 'ref32k' as clock source for watchdog.

Fixes: 72ea48610d43 ("clk: hi6220: Clock driver support for Hisilicon hi6220 SoC")
Signed-off-by: Leo Yan <leo.yan@linaro.org>

---
 drivers/clk/hisilicon/clk-hi6220.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

-- 
2.7.4

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Comments

Stephen Boyd Sept. 1, 2017, 1:32 a.m. UTC | #1
On 08/29, Leo Yan wrote:
> From: Dmitry Shmidt <dimitrysh@google.com>

> 

> This patch is to add watchdog binding for Hi6220 on Hikey board.

> 

> Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

> ---


This will go through arm-soc?

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Leo Yan Sept. 1, 2017, 2:16 a.m. UTC | #2
On Thu, Aug 31, 2017 at 06:32:40PM -0700, Stephen Boyd wrote:
> On 08/29, Leo Yan wrote:

> > The old code uses tcxo (19.2MHz) as watchdog clock but actually the

> > watchdog uses 32K clock, as result the watchdog timeout cannot be set

> > correctly and delay long time to reset SoC.

> > 

> > So this patch is to use 'ref32k' as clock source for watchdog.

> > 

> > Fixes: 72ea48610d43 ("clk: hi6220: Clock driver support for Hisilicon hi6220 SoC")

> > Signed-off-by: Leo Yan <leo.yan@linaro.org>

> > ---

> 

> Applied to clk-next


Thanks, Stephen.

> -- 

> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,

> a Linux Foundation Collaborative Project

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Wei Xu Sept. 1, 2017, 10:35 a.m. UTC | #3
Hi Stephen,

On 2017/9/1 2:32, Stephen Boyd wrote:
> On 08/29, Leo Yan wrote:

>> From: Dmitry Shmidt <dimitrysh@google.com>

>>

>> This patch is to add watchdog binding for Hi6220 on Hikey board.

>>

>> Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

>> ---

> 

> This will go through arm-soc?

> 


Can you pick up it for v4.14?
Otherwise I am fine to pick up it and queue for v4.15.
Thanks!

Best Regards,
Wei

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Stephen Boyd Sept. 1, 2017, 8:28 p.m. UTC | #4
On 09/01, Wei Xu wrote:
> Hi Stephen,

> 

> On 2017/9/1 2:32, Stephen Boyd wrote:

> > On 08/29, Leo Yan wrote:

> >> From: Dmitry Shmidt <dimitrysh@google.com>

> >>

> >> This patch is to add watchdog binding for Hi6220 on Hikey board.

> >>

> >> Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

> >> ---

> > 

> > This will go through arm-soc?

> > 

> 

> Can you pick up it for v4.14?

> Otherwise I am fine to pick up it and queue for v4.15.


Sounds like it will go for v4.15. Otherwise, you can send it to
arm-soc with the raw number instead of #define number and then
fix it up to use the #define later.

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Wei Xu Sept. 4, 2017, 9:21 a.m. UTC | #5
Hi Stephen,

On 2017/9/1 21:28, Stephen Boyd wrote:
> On 09/01, Wei Xu wrote:

>> Hi Stephen,

>>

>> On 2017/9/1 2:32, Stephen Boyd wrote:

>>> On 08/29, Leo Yan wrote:

>>>> From: Dmitry Shmidt <dimitrysh@google.com>

>>>>

>>>> This patch is to add watchdog binding for Hi6220 on Hikey board.

>>>>

>>>> Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

>>>> ---

>>>

>>> This will go through arm-soc?

>>>

>>

>> Can you pick up it for v4.14?

>> Otherwise I am fine to pick up it and queue for v4.15.

> 

> Sounds like it will go for v4.15. Otherwise, you can send it to

> arm-soc with the raw number instead of #define number and then

> fix it up to use the #define later.

> 


I did not get your meaning.
Do you mean the "HI6220_WDT0/1/2_PCLK" in the patch 1 that
we need to replace with raw number?
They are already in the mainline.

Best Regards,
Wei


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diff mbox series

Patch

diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c
index 4181b68..e786d71 100644
--- a/drivers/clk/hisilicon/clk-hi6220.c
+++ b/drivers/clk/hisilicon/clk-hi6220.c
@@ -55,9 +55,9 @@  static struct hisi_fixed_factor_clock hi6220_fixed_factor_clks[] __initdata = {
 };
 
 static struct hisi_gate_clock hi6220_separated_gate_clks_ao[] __initdata = {
-	{ HI6220_WDT0_PCLK,   "wdt0_pclk",   "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 12, 0, },
-	{ HI6220_WDT1_PCLK,   "wdt1_pclk",   "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 13, 0, },
-	{ HI6220_WDT2_PCLK,   "wdt2_pclk",   "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 14, 0, },
+	{ HI6220_WDT0_PCLK,   "wdt0_pclk",   "ref32k",   CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 12, 0, },
+	{ HI6220_WDT1_PCLK,   "wdt1_pclk",   "ref32k",   CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 13, 0, },
+	{ HI6220_WDT2_PCLK,   "wdt2_pclk",   "ref32k",   CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 14, 0, },
 	{ HI6220_TIMER0_PCLK, "timer0_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 15, 0, },
 	{ HI6220_TIMER1_PCLK, "timer1_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 16, 0, },
 	{ HI6220_TIMER2_PCLK, "timer2_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 17, 0, },