diff mbox

[1/2] arm64: dts: uniphier: fix I2C nodes of PH1-LD20

Message ID 1460716247-28049-2-git-send-email-yamada.masahiro@socionext.com
State Accepted
Commit 56896ef5b990a3822da45f92e548c4c8ac301bb4
Headers show

Commit Message

Masahiro Yamada April 15, 2016, 10:30 a.m. UTC
The I2C hardware blocks on this SoC are connected as follows:

  I2C0: external connection
  I2C1: external connection
  I2C2: internal connection
  I2C3: external connection
  I2C4: external connection
  I2C5: internal connection
  I2C6: no connection (not accessible)

Delete pinctrl from Ch2, add pinctrl to Ch4, and remove the Ch6 node.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

---

 .../boot/dts/socionext/uniphier-ph1-ld20-ref.dts     |  1 -
 arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 20 +++++---------------
 2 files changed, 5 insertions(+), 16 deletions(-)

-- 
1.9.1

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Comments

Arnd Bergmann April 23, 2016, 8:09 p.m. UTC | #1
On Friday 15 April 2016 19:30:46 Masahiro Yamada wrote:
> The I2C hardware blocks on this SoC are connected as follows:

> 

>   I2C0: external connection

>   I2C1: external connection

>   I2C2: internal connection

>   I2C3: external connection

>   I2C4: external connection

>   I2C5: internal connection

>   I2C6: no connection (not accessible)

> 

> Delete pinctrl from Ch2, add pinctrl to Ch4, and remove the Ch6 node.

> 

> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

> 



Applied patch 1/2 to the fixes branch now, thanks!

	Arnd
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diff mbox

Patch

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
index 727ae5f..b0ed443 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
@@ -70,7 +70,6 @@ 
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
-		i2c6 = &i2c6;
 	};
 };
 
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index e682a3f..651c9d9 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -201,15 +201,12 @@ 
 
 		i2c2: i2c@58782000 {
 			compatible = "socionext,uniphier-fi2c";
-			status = "disabled";
 			reg = <0x58782000 0x80>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupts = <0 43 4>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_i2c2>;
 			clocks = <&i2c_clk>;
-			clock-frequency = <100000>;
+			clock-frequency = <400000>;
 		};
 
 		i2c3: i2c@58783000 {
@@ -227,12 +224,15 @@ 
 
 		i2c4: i2c@58784000 {
 			compatible = "socionext,uniphier-fi2c";
+			status = "disabled";
 			reg = <0x58784000 0x80>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupts = <0 45 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_i2c4>;
 			clocks = <&i2c_clk>;
-			clock-frequency = <400000>;
+			clock-frequency = <100000>;
 		};
 
 		i2c5: i2c@58785000 {
@@ -245,16 +245,6 @@ 
 			clock-frequency = <400000>;
 		};
 
-		i2c6: i2c@58786000 {
-			compatible = "socionext,uniphier-fi2c";
-			reg = <0x58786000 0x80>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <0 26 4>;
-			clocks = <&i2c_clk>;
-			clock-frequency = <400000>;
-		};
-
 		system_bus: system-bus@58c00000 {
 			compatible = "socionext,uniphier-system-bus";
 			status = "disabled";