| Message ID | 6039323.u0bOnZZyyN@polaris |
|---|---|
| State | New |
| Headers | show |
On 13/11/16 22:30, Eric Botcazou wrote: > Similarly to x86, PowerPC and SPARC, this enables the use of custom run-time > descriptors in Ada, thus eliminating the need for trampolines and executable > stack in presence of pointers to nested functions. > > Tested on Aarch64/Linux, OK for the mainline? > > > 2016-11-13 Eric Botcazou <ebotcazou@adacore.com> > > PR ada/67205 > * config/aarch64/aarch64.c (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): > Define. > Sorry, missed this. OK. R. > > p.diff > > > Index: config/aarch64/aarch64.c > =================================================================== > --- config/aarch64/aarch64.c (revision 242334) > +++ config/aarch64/aarch64.c (working copy) > @@ -14502,6 +14502,10 @@ aarch64_optab_supported_p (int op, machi > #undef TARGET_OMIT_STRUCT_RETURN_REG > #define TARGET_OMIT_STRUCT_RETURN_REG true > > +/* The architecture reserves bits 0 and 1 so use bit 2 for descriptors. */ > +#undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS > +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 4 > + > struct gcc_target targetm = TARGET_INITIALIZER; > > #include "gt-aarch64.h" >
On Nov 13 2016, Eric Botcazou <ebotcazou@adacore.com> wrote: > Index: config/aarch64/aarch64.c > =================================================================== > --- config/aarch64/aarch64.c (revision 242334) > +++ config/aarch64/aarch64.c (working copy) > @@ -14502,6 +14502,10 @@ aarch64_optab_supported_p (int op, machi > #undef TARGET_OMIT_STRUCT_RETURN_REG > #define TARGET_OMIT_STRUCT_RETURN_REG true > > +/* The architecture reserves bits 0 and 1 so use bit 2 for descriptors. */ > +#undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS > +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 4 In which way are the bits reserved? This does not work for ILP32, because the descriptor address starts off at address 4 modulo 8, and adding 4 clears the bit. Andreas. -- Andreas Schwab, SUSE Labs, schwab@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."
> In which way are the bits reserved? I don't know, but that's what I was told by the ARM folks. > This does not work for ILP32, because the descriptor address starts off > at address 4 modulo 8, and adding 4 clears the bit. I see, can you try the attached patchlet? -- Eric BotcazouIndex: tree-nested.c =================================================================== --- tree-nested.c (revision 246276) +++ tree-nested.c (working copy) @@ -496,6 +496,8 @@ static GTY(()) tree descriptor_type; static tree get_descriptor_type (struct nesting_info *info) { + /* The base alignment is that of a function. */ + const unsigned align = FUNCTION_ALIGNMENT (FUNCTION_BOUNDARY); tree t; if (descriptor_type) @@ -505,6 +507,9 @@ get_descriptor_type (struct nesting_info t = build_array_type (ptr_type_node, t); t = build_decl (DECL_SOURCE_LOCATION (info->context), FIELD_DECL, get_identifier ("__data"), t); + if (DECL_ALIGN (t) < align) + SET_DECL_ALIGN (t, align); + DECL_USER_ALIGN (t) = 1; descriptor_type = make_node (RECORD_TYPE); TYPE_NAME (descriptor_type) = get_identifier ("__builtin_descriptor");
On Apr 03 2017, Eric Botcazou <ebotcazou@adacore.com> wrote: >> In which way are the bits reserved? > > I don't know, but that's what I was told by the ARM folks. > >> This does not work for ILP32, because the descriptor address starts off >> at address 4 modulo 8, and adding 4 clears the bit. > > I see, can you try the attached patchlet? Thanks, that at least fixes tasking. Andreas. -- Andreas Schwab, SUSE Labs, schwab@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."
> Thanks, that at least fixes tasking.
Great, here's what I have installed on the mainline (it only affects the Ada
compiler) after testing on x86-64/Linux, Aarch64/Linux and SPARC/Solaris.
2017-04-03 Eric Botcazou <ebotcazou@adacore.com>
* tree-nested.c (get_descriptor_type): Make sure that the alignment
of descriptors is at least equal to that of functions.
--
Eric BotcazouIndex: tree-nested.c
===================================================================
--- tree-nested.c (revision 246276)
+++ tree-nested.c (working copy)
@@ -496,6 +496,8 @@ static GTY(()) tree descriptor_type;
static tree
get_descriptor_type (struct nesting_info *info)
{
+ /* The base alignment is that of a function. */
+ const unsigned align = FUNCTION_ALIGNMENT (FUNCTION_BOUNDARY);
tree t;
if (descriptor_type)
@@ -505,6 +507,8 @@ get_descriptor_type (struct nesting_info
t = build_array_type (ptr_type_node, t);
t = build_decl (DECL_SOURCE_LOCATION (info->context),
FIELD_DECL, get_identifier ("__data"), t);
+ SET_DECL_ALIGN (t, MAX (TYPE_ALIGN (ptr_type_node), align));
+ DECL_USER_ALIGN (t) = 1;
descriptor_type = make_node (RECORD_TYPE);
TYPE_NAME (descriptor_type) = get_identifier ("__builtin_descriptor");
Index: config/aarch64/aarch64.c =================================================================== --- config/aarch64/aarch64.c (revision 242334) +++ config/aarch64/aarch64.c (working copy) @@ -14502,6 +14502,10 @@ aarch64_optab_supported_p (int op, machi #undef TARGET_OMIT_STRUCT_RETURN_REG #define TARGET_OMIT_STRUCT_RETURN_REG true +/* The architecture reserves bits 0 and 1 so use bit 2 for descriptors. */ +#undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 4 + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-aarch64.h"