| Message ID | 1482468402-7782-1-git-send-email-yamada.masahiro@socionext.com |
|---|---|
| State | New |
| Headers | show |
On Fri, Dec 23, 2016 at 01:46:42PM +0900, Masahiro Yamada wrote: > The top-level Makefile defines: > > CPP = $(CC) -E hum, so that'd work for running from top level, but I guess it fails for compiling from other places..? like tools/perf jirka > > So, $(CC) -E can be replaced with $(CPP) and this makes more sense > for pre-processing. > > Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> > --- > > tools/build/Makefile.build | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/build/Makefile.build b/tools/build/Makefile.build > index 99c0ccd..4a0ec5c 100644 > --- a/tools/build/Makefile.build > +++ b/tools/build/Makefile.build > @@ -65,7 +65,7 @@ quiet_cmd_cxx_o_c = CXX $@ > cmd_cxx_o_c = $(CXX) $(cxx_flags) -c -o $@ $< > > quiet_cmd_cpp_i_c = CPP $@ > - cmd_cpp_i_c = $(CC) $(c_flags) -E -o $@ $< > + cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $< > > quiet_cmd_cc_s_c = AS $@ > cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $< > -- > 2.7.4 >
Hi Jiri, 2016-12-23 19:59 GMT+09:00 Jiri Olsa <jolsa@redhat.com>: > On Fri, Dec 23, 2016 at 01:46:42PM +0900, Masahiro Yamada wrote: >> The top-level Makefile defines: >> >> CPP = $(CC) -E > > hum, so that'd work for running from top level, but I guess > it fails for compiling from other places..? like tools/perf I thought users are supposed to build tools from the top-level, but seems it is not necessarily true according to your statement. I am not quite sure how CC, AS, etc. are set-up, then. Perhaps, relying on Make-builtin variables? $ make --print-data-base | grep CPP showed me the default of CPP is CPP = $(CC) -E I guess you are more familiar to the tools-build area, so I follow your decision. -- Best Regards Masahiro Yamada
diff --git a/tools/build/Makefile.build b/tools/build/Makefile.build index 99c0ccd..4a0ec5c 100644 --- a/tools/build/Makefile.build +++ b/tools/build/Makefile.build @@ -65,7 +65,7 @@ quiet_cmd_cxx_o_c = CXX $@ cmd_cxx_o_c = $(CXX) $(cxx_flags) -c -o $@ $< quiet_cmd_cpp_i_c = CPP $@ - cmd_cpp_i_c = $(CC) $(c_flags) -E -o $@ $< + cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $< quiet_cmd_cc_s_c = AS $@ cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<
The top-level Makefile defines: CPP = $(CC) -E So, $(CC) -E can be replaced with $(CPP) and this makes more sense for pre-processing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- tools/build/Makefile.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4