@@ -377,7 +377,7 @@
*/
#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
#define V_OSCK 20000000 /* Clock output from T2 */
#else
#define V_OSCK 19200000 /* Clock output from T2 */
@@ -24,7 +24,7 @@
#define GPMC_BASE 0x50000000
/* EDMA3 Base address for DRA7XX and AM57XX */
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
#define EDMA3_BASE 0x43300000
#endif
@@ -29,13 +29,13 @@
#define CONTROL_CORE_ID_CODE 0x4A002204
#define CONTROL_WKUP_ID_CODE 0x4AE0C204
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
#define CONTROL_ID_CODE CONTROL_WKUP_ID_CODE
#else
#define CONTROL_ID_CODE CONTROL_CORE_ID_CODE
#endif
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
#define DRA7_USB_OTG_SS1_BASE 0x48890000
#define DRA7_USB_OTG_SS1_GLUE_BASE 0x48880000
#define DRA7_USB3_PHY1_PLL_CTRL 0x4A084C00
@@ -185,7 +185,7 @@ struct s32ktimer {
* much larger) and do not, at this time, make use of the additional
* space.
*/
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
#define NON_SECURE_SRAM_IMG_END 0x4037E000
@@ -12,7 +12,7 @@
#include <spl.h>
static u32 boot_devices[] = {
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
BOOT_DEVICE_MMC2,
BOOT_DEVICE_NAND,
BOOT_DEVICE_MMC1,
@@ -472,7 +472,7 @@ void enable_basic_clocks(void)
void enable_basic_uboot_clocks(void)
{
u32 const clk_domains_essential[] = {
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
(*prcm)->cm_ipu_clkstctrl,
#endif
0
@@ -488,7 +488,7 @@ void enable_basic_uboot_clocks(void)
(*prcm)->cm_l4per_i2c2_clkctrl,
(*prcm)->cm_l4per_i2c3_clkctrl,
(*prcm)->cm_l4per_i2c4_clkctrl,
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
(*prcm)->cm_ipu_i2c5_clkctrl,
#else
(*prcm)->cm_l4per_i2c5_clkctrl,
@@ -671,8 +671,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
case 1:
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
#if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
- defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) || \
- defined(CONFIG_AM33XX) || \
+ defined(CONFIG_DRA7XX) || defined(CONFIG_AM33XX) || \
defined(CONFIG_AM43XX) || defined(CONFIG_SOC_KEYSTONE)) && \
defined(CONFIG_HSMMC2_8BIT)
/* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */
@@ -683,7 +682,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
#ifdef OMAP_HSMMC3_BASE
case 2:
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE;
-#if (defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)) && defined(CONFIG_HSMMC3_8BIT)
+#if defined(CONFIG_DRA7XX) && defined(CONFIG_HSMMC3_8BIT)
/* Enable 8-bit interface for eMMC on DRA7XX */
host_caps_val |= MMC_MODE_8BIT;
#endif
@@ -46,7 +46,7 @@ int palmas_mmc1_poweron_ldo(uint voltage)
{
u8 val = 0;
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
/*
* Currently valid for the dra7xx_evm board:
* Set TPS659038 LDO1 to 3.0 V
@@ -383,7 +383,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
priv->base = (struct ti_qspi_regs *)QSPI_BASE;
priv->mode = mode;
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
priv->ctrl_mod_mmap = (void *)CORE_CTRL_IO;
priv->slave.memory_map = (void *)MMAP_START_ADDR_DRA;
priv->fclk = QSPI_DRA7XX_FCLK;
@@ -193,7 +193,7 @@ void ti_usb2_phy_power(struct ti_usb_phy *phy, int on)
val = readl(phy->usb2_phy_power);
if (on) {
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
if (phy->index == 1)
val &= ~OMAP_CTRL_USB2_PHY_PD;
else
@@ -205,7 +205,7 @@ void ti_usb2_phy_power(struct ti_usb_phy *phy, int on)
AM437X_CTRL_USB2_OTGSESSEND_EN);
#endif
} else {
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
if (phy->index == 1)
val |= OMAP_CTRL_USB2_PHY_PD;
else
@@ -12,7 +12,7 @@
#ifndef __CONFIG_AM57XX_EVM_H
#define __CONFIG_AM57XX_EVM_H
-#define CONFIG_AM57XX
+#define CONFIG_DRA7XX
#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION
@@ -86,7 +86,6 @@ CONFIG_AM335X_USB1
CONFIG_AM335X_USB1_MODE
CONFIG_AM33XX
CONFIG_AM437X_USB2PHY2_HOST
-CONFIG_AM57XX
CONFIG_AMBAPP_IOAREA
CONFIG_AMCC_DEF_ENV
CONFIG_AMCC_DEF_ENV_NOR_UPD