diff mbox

[v3,1/4] reset: hisilicon: Add media reset controller binding

Message ID 20160620035007.229629-2-xinliang.liu@linaro.org
State Accepted
Commit 50f44e894ad06eb8b401308c3cfe5bceaaa26df2
Headers show

Commit Message

Xinliang Liu June 20, 2016, 3:50 a.m. UTC
Add compatible for media reset controller.

Actually, there are two reset controllers in hi6220 SoC:
The peripheral reset controller bits are part of sysctrl registers.
The media reset controller bits are part of mediactrl registers.
So for the compatible part, it should contain "syscon" for both peripheral
and media reset controller.

Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>

---
 Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

-- 
2.8.3

Comments

Xinliang Liu June 20, 2016, 1:55 p.m. UTC | #1
On 20 June 2016 at 20:07, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> Am Montag, den 20.06.2016, 11:50 +0800 schrieb Xinliang Liu:

>>

>>  Required properties:

>> -- compatible: may be "hisilicon,hi6220-sysctrl"

>> +- compatible: should be one of the following:

>> +  - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.

>> +  - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.

>>  - reg: should be register base and length as documented in the

>>    datasheet

>>  - #reset-cells: 1, see below

>

> Thanks, I've applied all four patches to my reset/next branch.


Thanks, Philipp.

>

> You should eventually add the "syscon" compatible where it is still

> missing in Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt

> and Documentation/devicetree/bindings/clock/hi6220-clock.txt.


Will add the missing patches at other thread.

Thanks,
-xinliang

>

> regards

> Philipp

>
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
index e0b185a944ba..c25da39df707 100644
--- a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
+++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
@@ -8,7 +8,9 @@  The reset controller registers are part of the system-ctl block on
 hi6220 SoC.
 
 Required properties:
-- compatible: may be "hisilicon,hi6220-sysctrl"
+- compatible: should be one of the following:
+  - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
+  - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.
 - reg: should be register base and length as documented in the
   datasheet
 - #reset-cells: 1, see below