| Message ID | 1464443656-12108-3-git-send-email-evan.lloyd@arm.com |
|---|---|
| State | Superseded |
| Headers | show |
On 28 May 2016 at 14:54, <evan.lloyd@arm.com> wrote: > From: Evan Lloyd <evan.lloyd@arm.com> > > The PCDs used in the PL011 UART Driver and Serial Port Library are > inherently "fixed at build". This change updates the source to use > Fixed PCDs for these values. This improves clarity and efficiency. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> > Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> This introduces a few lines > 80 columns, but then also highlights that the previous patch didn't fix some lines that were also over 80 columns wide too. But otherwise, it looks fine and works fine too. Tested on Juno R2 and FVP Foundation and AEMv8 models. Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> > --- > ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf | 4 ++-- > ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf | 4 ++-- > ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c | 10 ++++----- > ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c | 22 ++++++++++---------- > 4 files changed, 20 insertions(+), 20 deletions(-) > > diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf > index 18df7c9fb94431ffa1d2e8b4c06dfb82e53181e5..5afce36d3935e7fd79c25c46360d72328b2a571f 100644 > --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf > +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf > @@ -2,7 +2,7 @@ > # > # Component description file for PL011Uart module > # > -# Copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR> > +# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR> > # > # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the BSD License > @@ -34,7 +34,7 @@ [Packages] > MdeModulePkg/MdeModulePkg.dec > ArmPlatformPkg/ArmPlatformPkg.dec > > -[Pcd] > +[FixedPcd] > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate > > gArmPlatformTokenSpaceGuid.PL011UartClkInHz > diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf > index 3a950d0788d481ab73408af41343dfcfa2378a6e..653c0b2dfc147f1d82155e4150812f0cb4c59e12 100644 > --- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf > +++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf > @@ -2,7 +2,7 @@ > # > # Component description file for PL011SerialPortLib module > # > -# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR> > +# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR> > # > # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the BSD License > @@ -35,7 +35,7 @@ [Packages] > MdeModulePkg/MdeModulePkg.dec > ArmPlatformPkg/ArmPlatformPkg.dec > > -[Pcd] > +[FixedPcd] > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase > gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate > gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits > diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > index 006feab72e82f9735d11b471e031f8b149026ccf..cd2cccad6295544b0b4d4c0aa4ceb7ac7b56a8e7 100644 > --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > @@ -168,17 +168,17 @@ PL011UartInitializePort ( > // > > // If PL011 Integer value has been defined then always ignore the BAUD rate > - if (PcdGet32 (PL011UartInteger) != 0) { > - MmioWrite32 (UartBase + UARTIBRD, PcdGet32 (PL011UartInteger)); > - MmioWrite32 (UartBase + UARTFBRD, PcdGet32 (PL011UartFractional)); > + if (FixedPcdGet32 (PL011UartInteger) != 0) { > + MmioWrite32 (UartBase + UARTIBRD, FixedPcdGet32 (PL011UartInteger)); > + MmioWrite32 (UartBase + UARTFBRD, FixedPcdGet32 (PL011UartFractional)); > } else { > // If BAUD rate is zero then replace it with the system default value > if (*BaudRate == 0) { > - *BaudRate = PcdGet32 (PcdSerialBaudRate); > + *BaudRate = FixedPcdGet32 (PcdSerialBaudRate); > ASSERT (*BaudRate != 0); > } > > - Divisor = (PcdGet32 (PL011UartClkInHz) * 4) / *BaudRate; > + Divisor = (FixedPcdGet32 (PL011UartClkInHz) * 4) / *BaudRate; > MmioWrite32 (UartBase + UARTIBRD, Divisor >> FRACTION_PART_SIZE_IN_BITS); > MmioWrite32 (UartBase + UARTFBRD, Divisor & FRACTION_PART_MASK); > } > diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c > index 1b4043b61c18a4eada4446c9b99a767b4cbc74a7..9c998a63cfe4e1506e6c1f0aa25ab6566f6dbf65 100644 > --- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c > +++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c > @@ -43,14 +43,14 @@ SerialPortInitialize ( > UINT8 DataBits; > EFI_STOP_BITS_TYPE StopBits; > > - BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate); > + BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate); > ReceiveFifoDepth = 0; // Use default FIFO depth > - Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity); > - DataBits = PcdGet8 (PcdUartDefaultDataBits); > - StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits); > + Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity); > + DataBits = FixedPcdGet8 (PcdUartDefaultDataBits); > + StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits); > > return PL011UartInitializePort ( > - (UINTN)PcdGet64 (PcdSerialRegisterBase), > + (UINTN)FixedPcdGet64 (PcdSerialRegisterBase), > &BaudRate, > &ReceiveFifoDepth, > &Parity, > @@ -76,7 +76,7 @@ SerialPortWrite ( > IN UINTN NumberOfBytes > ) > { > - return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); > + return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); > } > > /** > @@ -96,7 +96,7 @@ SerialPortRead ( > IN UINTN NumberOfBytes > ) > { > - return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); > + return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); > } > > /** > @@ -113,7 +113,7 @@ SerialPortPoll ( > VOID > ) > { > - return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase)); > + return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase)); > } > /** > Set new attributes to PL011. > @@ -150,7 +150,7 @@ SerialPortSetAttributes ( > ) > { > return PL011UartInitializePort ( > - (UINTN)PcdGet64 (PcdSerialRegisterBase), > + (UINTN)FixedPcdGet64 (PcdSerialRegisterBase), > BaudRate, > ReceiveFifoDepth, > Parity, > @@ -191,7 +191,7 @@ SerialPortSetControl ( > IN UINT32 Control > ) > { > - return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control); > + return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control); > } > > /** > @@ -228,5 +228,5 @@ SerialPortGetControl ( > OUT UINT32 *Control > ) > { > - return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control); > + return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control); > } > -- > Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf index 18df7c9fb94431ffa1d2e8b4c06dfb82e53181e5..5afce36d3935e7fd79c25c46360d72328b2a571f 100644 --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf @@ -2,7 +2,7 @@ # # Component description file for PL011Uart module # -# Copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR> +# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR> # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -34,7 +34,7 @@ [Packages] MdeModulePkg/MdeModulePkg.dec ArmPlatformPkg/ArmPlatformPkg.dec -[Pcd] +[FixedPcd] gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate gArmPlatformTokenSpaceGuid.PL011UartClkInHz diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf index 3a950d0788d481ab73408af41343dfcfa2378a6e..653c0b2dfc147f1d82155e4150812f0cb4c59e12 100644 --- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf +++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf @@ -2,7 +2,7 @@ # # Component description file for PL011SerialPortLib module # -# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR> +# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR> # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -35,7 +35,7 @@ [Packages] MdeModulePkg/MdeModulePkg.dec ArmPlatformPkg/ArmPlatformPkg.dec -[Pcd] +[FixedPcd] gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c index 006feab72e82f9735d11b471e031f8b149026ccf..cd2cccad6295544b0b4d4c0aa4ceb7ac7b56a8e7 100644 --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c @@ -168,17 +168,17 @@ PL011UartInitializePort ( // // If PL011 Integer value has been defined then always ignore the BAUD rate - if (PcdGet32 (PL011UartInteger) != 0) { - MmioWrite32 (UartBase + UARTIBRD, PcdGet32 (PL011UartInteger)); - MmioWrite32 (UartBase + UARTFBRD, PcdGet32 (PL011UartFractional)); + if (FixedPcdGet32 (PL011UartInteger) != 0) { + MmioWrite32 (UartBase + UARTIBRD, FixedPcdGet32 (PL011UartInteger)); + MmioWrite32 (UartBase + UARTFBRD, FixedPcdGet32 (PL011UartFractional)); } else { // If BAUD rate is zero then replace it with the system default value if (*BaudRate == 0) { - *BaudRate = PcdGet32 (PcdSerialBaudRate); + *BaudRate = FixedPcdGet32 (PcdSerialBaudRate); ASSERT (*BaudRate != 0); } - Divisor = (PcdGet32 (PL011UartClkInHz) * 4) / *BaudRate; + Divisor = (FixedPcdGet32 (PL011UartClkInHz) * 4) / *BaudRate; MmioWrite32 (UartBase + UARTIBRD, Divisor >> FRACTION_PART_SIZE_IN_BITS); MmioWrite32 (UartBase + UARTFBRD, Divisor & FRACTION_PART_MASK); } diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c index 1b4043b61c18a4eada4446c9b99a767b4cbc74a7..9c998a63cfe4e1506e6c1f0aa25ab6566f6dbf65 100644 --- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c +++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c @@ -43,14 +43,14 @@ SerialPortInitialize ( UINT8 DataBits; EFI_STOP_BITS_TYPE StopBits; - BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate); + BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate); ReceiveFifoDepth = 0; // Use default FIFO depth - Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity); - DataBits = PcdGet8 (PcdUartDefaultDataBits); - StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits); + Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity); + DataBits = FixedPcdGet8 (PcdUartDefaultDataBits); + StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits); return PL011UartInitializePort ( - (UINTN)PcdGet64 (PcdSerialRegisterBase), + (UINTN)FixedPcdGet64 (PcdSerialRegisterBase), &BaudRate, &ReceiveFifoDepth, &Parity, @@ -76,7 +76,7 @@ SerialPortWrite ( IN UINTN NumberOfBytes ) { - return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); + return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); } /** @@ -96,7 +96,7 @@ SerialPortRead ( IN UINTN NumberOfBytes ) { - return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); + return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); } /** @@ -113,7 +113,7 @@ SerialPortPoll ( VOID ) { - return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase)); + return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase)); } /** Set new attributes to PL011. @@ -150,7 +150,7 @@ SerialPortSetAttributes ( ) { return PL011UartInitializePort ( - (UINTN)PcdGet64 (PcdSerialRegisterBase), + (UINTN)FixedPcdGet64 (PcdSerialRegisterBase), BaudRate, ReceiveFifoDepth, Parity, @@ -191,7 +191,7 @@ SerialPortSetControl ( IN UINT32 Control ) { - return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control); + return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control); } /** @@ -228,5 +228,5 @@ SerialPortGetControl ( OUT UINT32 *Control ) { - return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control); + return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control); }