| Message ID | 1455431363-113771-2-git-send-email-puck.chen@hisilicon.com |
|---|---|
| State | New |
| Headers | show |
On Sun, 14 Feb 2016, Chen Feng wrote: > DT bindings for hisilicon hi655x MFD PMIC chip. > > Signed-off-by: Chen Feng <puck.chen@hisilicon.com> > Signed-off-by: Fei Wang <w.f@huawei.com> > Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com> > Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> > --- > .../devicetree/bindings/mfd/hisilicon,hi655x.txt | 27 ++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt For my own reference: Acked-by: Lee Jones <lee.jones@linaro.org> > diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt > new file mode 100644 > index 0000000..0548569 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt > @@ -0,0 +1,27 @@ > +Hisilicon Hi655x Power Management Integrated Circuit (PMIC) > + > +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. > +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. > +We can use memory-mapped I/O to communicate. > + > ++----------------+ +-------------+ > +| | | | > +| Hi6220 | SSI bus | Hi655x | > +| |-------------| | > +| |(REGMAP_MMIO)| | > ++----------------+ +-------------+ > + > +Required properties: > +- compatible: Should be "hisilicon,hi655x-pmic". > +- reg: Base address of PMIC on Hi6220 SoC. > +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). > +- pmic-gpios: The GPIO used by PMIC IRQ. > + > +Example: > + pmic: pmic@f8000000 { > + compatible = "hisilicon,hi655x-pmic"; > + reg = <0x0 0xf8000000 0x0 0x1000>; > + interrupt-controller; > + #interrupt-cells = <2>; > + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; > + } -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog
Lee, Thanks for your review. On 2016/2/15 16:32, Lee Jones wrote: > On Sun, 14 Feb 2016, Chen Feng wrote: > >> DT bindings for hisilicon hi655x MFD PMIC chip. >> >> Signed-off-by: Chen Feng <puck.chen@hisilicon.com> >> Signed-off-by: Fei Wang <w.f@huawei.com> >> Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com> >> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> >> --- >> .../devicetree/bindings/mfd/hisilicon,hi655x.txt | 27 ++++++++++++++++++++++ >> 1 file changed, 27 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt > > For my own reference: > Acked-by: Lee Jones <lee.jones@linaro.org> > Will you merge this into your git-repo? git git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git I saw mark already merged the part of regulator into his git tree. Hi Wei, Could you help merge the DTS part of these patch sets. >> diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt >> new file mode 100644 >> index 0000000..0548569 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt >> @@ -0,0 +1,27 @@ >> +Hisilicon Hi655x Power Management Integrated Circuit (PMIC) >> + >> +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. >> +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. >> +We can use memory-mapped I/O to communicate. >> + >> ++----------------+ +-------------+ >> +| | | | >> +| Hi6220 | SSI bus | Hi655x | >> +| |-------------| | >> +| |(REGMAP_MMIO)| | >> ++----------------+ +-------------+ >> + >> +Required properties: >> +- compatible: Should be "hisilicon,hi655x-pmic". >> +- reg: Base address of PMIC on Hi6220 SoC. >> +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). >> +- pmic-gpios: The GPIO used by PMIC IRQ. >> + >> +Example: >> + pmic: pmic@f8000000 { >> + compatible = "hisilicon,hi655x-pmic"; >> + reg = <0x0 0xf8000000 0x0 0x1000>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; >> + } >
Hi Leo, On 16/02/2016 09:21, Chen Feng wrote: > Lee, > Thanks for your review. > > On 2016/2/15 16:32, Lee Jones wrote: >> On Sun, 14 Feb 2016, Chen Feng wrote: >> >>> DT bindings for hisilicon hi655x MFD PMIC chip. >>> >>> Signed-off-by: Chen Feng <puck.chen@hisilicon.com> >>> Signed-off-by: Fei Wang <w.f@huawei.com> >>> Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com> >>> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> >>> --- >>> .../devicetree/bindings/mfd/hisilicon,hi655x.txt | 27 ++++++++++++++++++++++ >>> 1 file changed, 27 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt >> >> For my own reference: >> Acked-by: Lee Jones <lee.jones@linaro.org> >> > > Will you merge this into your git-repo? > > git git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git > > I saw mark already merged the part of regulator into his git tree. > > > > > Hi Wei, > > Could you help merge the DTS part of these patch sets. Applied the 5th patch into the hisilicon soc tree. Thanks! Best Regards, Wei > >>> diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt >>> new file mode 100644 >>> index 0000000..0548569 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt >>> @@ -0,0 +1,27 @@ >>> +Hisilicon Hi655x Power Management Integrated Circuit (PMIC) >>> + >>> +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. >>> +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. >>> +We can use memory-mapped I/O to communicate. >>> + >>> ++----------------+ +-------------+ >>> +| | | | >>> +| Hi6220 | SSI bus | Hi655x | >>> +| |-------------| | >>> +| |(REGMAP_MMIO)| | >>> ++----------------+ +-------------+ >>> + >>> +Required properties: >>> +- compatible: Should be "hisilicon,hi655x-pmic". >>> +- reg: Base address of PMIC on Hi6220 SoC. >>> +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). >>> +- pmic-gpios: The GPIO used by PMIC IRQ. >>> + >>> +Example: >>> + pmic: pmic@f8000000 { >>> + compatible = "hisilicon,hi655x-pmic"; >>> + reg = <0x0 0xf8000000 0x0 0x1000>; >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; >>> + } >> > > > . >
On Sun, 14 Feb 2016, Chen Feng wrote: > DT bindings for hisilicon hi655x MFD PMIC chip. > > Signed-off-by: Chen Feng <puck.chen@hisilicon.com> > Signed-off-by: Fei Wang <w.f@huawei.com> > Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com> > Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> > --- > .../devicetree/bindings/mfd/hisilicon,hi655x.txt | 27 ++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt Applied, thanks. > diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt > new file mode 100644 > index 0000000..0548569 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt > @@ -0,0 +1,27 @@ > +Hisilicon Hi655x Power Management Integrated Circuit (PMIC) > + > +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. > +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. > +We can use memory-mapped I/O to communicate. > + > ++----------------+ +-------------+ > +| | | | > +| Hi6220 | SSI bus | Hi655x | > +| |-------------| | > +| |(REGMAP_MMIO)| | > ++----------------+ +-------------+ > + > +Required properties: > +- compatible: Should be "hisilicon,hi655x-pmic". > +- reg: Base address of PMIC on Hi6220 SoC. > +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). > +- pmic-gpios: The GPIO used by PMIC IRQ. > + > +Example: > + pmic: pmic@f8000000 { > + compatible = "hisilicon,hi655x-pmic"; > + reg = <0x0 0xf8000000 0x0 0x1000>; > + interrupt-controller; > + #interrupt-cells = <2>; > + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; > + } -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog
diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt new file mode 100644 index 0000000..0548569 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt @@ -0,0 +1,27 @@ +Hisilicon Hi655x Power Management Integrated Circuit (PMIC) + +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. +We can use memory-mapped I/O to communicate. + ++----------------+ +-------------+ +| | | | +| Hi6220 | SSI bus | Hi655x | +| |-------------| | +| |(REGMAP_MMIO)| | ++----------------+ +-------------+ + +Required properties: +- compatible: Should be "hisilicon,hi655x-pmic". +- reg: Base address of PMIC on Hi6220 SoC. +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). +- pmic-gpios: The GPIO used by PMIC IRQ. + +Example: + pmic: pmic@f8000000 { + compatible = "hisilicon,hi655x-pmic"; + reg = <0x0 0xf8000000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }