| Message ID | 1372664531-6583-1-git-send-email-rajeshwari.s@samsung.com |
|---|---|
| State | New |
| Headers | show |
On 01/07/13 16:42, Rajeshwari Shinde wrote: > EXYNOS4 user manual equation for calculating PLL output is > FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) > hence updating accordingly. > > Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> > --- > arch/arm/cpu/armv7/exynos/clock.c | 11 +++++++++-- > 1 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c > index e1c4246..af0fa5b 100644 > --- a/arch/arm/cpu/armv7/exynos/clock.c > +++ b/arch/arm/cpu/armv7/exynos/clock.c > @@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) > /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */ > fout = (m + k / 1024) * (freq / (p * (1 << s))); > } else { > - /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ > - fout = m * (freq / (p * (1 << s))); > + if (cpu_is_exynos4()) { > + if (s < 1) > + s = 1; > + /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */ > + fout = m * (freq / (p * (1 << (s - 1)))); > + } else { > + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ > + fout = m * (freq / (p * (1 << s))); > + } > } > > return fout; > I checked about it. It was wrong, but your patch doesn't fit too. exynos4210 FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) exynos4412 FOUT = MDIV * FIN / (PDIV * 2^SDIV) exynos5250 FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) At past, our code was, FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) It was changed by Akshay's patch. commit 234370cab4b2f096e095fe8f3284fd39740a4023 Author: Akshay Saraswat <akshay.s@samsung.com> Date: Fri Mar 22 02:26:36 2013 +0000 Exynos5: clock: Update the equation to calculate PLL output frequency According to the latest exynos5 user manual, the equation for calculating PLL output was changed to FOUT= MDIV x FIN/(PDIV x 2^SDIV) earlier it was FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) So updating the clock code accordingly. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> According to Akshay's patch. exynos5250 should be FOUT = MDIV * FIN / (PDIV * 2^SDIV) but my manual (I'm not sure that is latest version) shows FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) Akshay, please check this. Rajeshwari, Thank you for raise this issue, I'll check it and resend the patch. Thanks, Minkyu Kang.
Hi Minkyu Kang, As per the user manual I have for EXYNOS5 it is FOUT = MDIV * FIN / (PDIV * 2^SDIV) Regards, Rajeshwari Shinde. On Mon, Jul 1, 2013 at 1:56 PM, Minkyu Kang <mk7.kang@samsung.com> wrote: > On 01/07/13 16:42, Rajeshwari Shinde wrote: >> EXYNOS4 user manual equation for calculating PLL output is >> FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) >> hence updating accordingly. >> >> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> >> --- >> arch/arm/cpu/armv7/exynos/clock.c | 11 +++++++++-- >> 1 files changed, 9 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c >> index e1c4246..af0fa5b 100644 >> --- a/arch/arm/cpu/armv7/exynos/clock.c >> +++ b/arch/arm/cpu/armv7/exynos/clock.c >> @@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) >> /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */ >> fout = (m + k / 1024) * (freq / (p * (1 << s))); >> } else { >> - /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ >> - fout = m * (freq / (p * (1 << s))); >> + if (cpu_is_exynos4()) { >> + if (s < 1) >> + s = 1; >> + /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */ >> + fout = m * (freq / (p * (1 << (s - 1)))); >> + } else { >> + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ >> + fout = m * (freq / (p * (1 << s))); >> + } >> } >> >> return fout; >> > > I checked about it. > It was wrong, but your patch doesn't fit too. > > exynos4210 > FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) > > exynos4412 > FOUT = MDIV * FIN / (PDIV * 2^SDIV) > > exynos5250 > FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) > > At past, our code was, > FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) > It was changed by Akshay's patch. > > > commit 234370cab4b2f096e095fe8f3284fd39740a4023 > Author: Akshay Saraswat <akshay.s@samsung.com> > Date: Fri Mar 22 02:26:36 2013 +0000 > > Exynos5: clock: Update the equation to calculate PLL output frequency > > According to the latest exynos5 user manual, the equation for > calculating PLL output was changed to > FOUT= MDIV x FIN/(PDIV x 2^SDIV) > earlier it was > FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) > So updating the clock code accordingly. > > Signed-off-by: Hatim Ali <hatim.rv@samsung.com> > Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> > Acked-by: Simon Glass <sjg@chromium.org> > > > According to Akshay's patch. > exynos5250 should be > FOUT = MDIV * FIN / (PDIV * 2^SDIV) > but my manual (I'm not sure that is latest version) shows > FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) > > Akshay, > please check this. > > Rajeshwari, > Thank you for raise this issue, > I'll check it and resend the patch. > > Thanks, > Minkyu Kang. > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
On 01/07/13 17:41, Rajeshwari Birje wrote: > Hi Minkyu Kang, > > As per the user manual I have for EXYNOS5 it is > FOUT = MDIV * FIN / (PDIV * 2^SDIV) What is your version of manual? If possible, could you please send it to me? > > Regards, > Rajeshwari Shinde. > > On Mon, Jul 1, 2013 at 1:56 PM, Minkyu Kang <mk7.kang@samsung.com> wrote: >> On 01/07/13 16:42, Rajeshwari Shinde wrote: >>> EXYNOS4 user manual equation for calculating PLL output is >>> FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) >>> hence updating accordingly. >>> >>> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> >>> --- >>> arch/arm/cpu/armv7/exynos/clock.c | 11 +++++++++-- >>> 1 files changed, 9 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c >>> index e1c4246..af0fa5b 100644 >>> --- a/arch/arm/cpu/armv7/exynos/clock.c >>> +++ b/arch/arm/cpu/armv7/exynos/clock.c >>> @@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) >>> /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */ >>> fout = (m + k / 1024) * (freq / (p * (1 << s))); >>> } else { >>> - /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ >>> - fout = m * (freq / (p * (1 << s))); >>> + if (cpu_is_exynos4()) { >>> + if (s < 1) >>> + s = 1; >>> + /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */ >>> + fout = m * (freq / (p * (1 << (s - 1)))); >>> + } else { >>> + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ >>> + fout = m * (freq / (p * (1 << s))); >>> + } >>> } >>> >>> return fout; >>> >> >> I checked about it. >> It was wrong, but your patch doesn't fit too. >> >> exynos4210 >> FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) >> >> exynos4412 >> FOUT = MDIV * FIN / (PDIV * 2^SDIV) >> >> exynos5250 >> FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) >> >> At past, our code was, >> FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) >> It was changed by Akshay's patch. >> >> >> commit 234370cab4b2f096e095fe8f3284fd39740a4023 >> Author: Akshay Saraswat <akshay.s@samsung.com> >> Date: Fri Mar 22 02:26:36 2013 +0000 >> >> Exynos5: clock: Update the equation to calculate PLL output frequency >> >> According to the latest exynos5 user manual, the equation for >> calculating PLL output was changed to >> FOUT= MDIV x FIN/(PDIV x 2^SDIV) >> earlier it was >> FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) >> So updating the clock code accordingly. >> >> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> >> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> >> Acked-by: Simon Glass <sjg@chromium.org> >> >> >> According to Akshay's patch. >> exynos5250 should be >> FOUT = MDIV * FIN / (PDIV * 2^SDIV) >> but my manual (I'm not sure that is latest version) shows >> FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) >> >> Akshay, >> please check this. >> >> Rajeshwari, >> Thank you for raise this issue, >> I'll check it and resend the patch. >> >> Thanks, >> Minkyu Kang. >> _______________________________________________ >> U-Boot mailing list >> U-Boot@lists.denx.de >> http://lists.denx.de/mailman/listinfo/u-boot > > > Thanks, Minkyu Kang.
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index e1c4246..af0fa5b 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */ fout = (m + k / 1024) * (freq / (p * (1 << s))); } else { - /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ - fout = m * (freq / (p * (1 << s))); + if (cpu_is_exynos4()) { + if (s < 1) + s = 1; + /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */ + fout = m * (freq / (p * (1 << (s - 1)))); + } else { + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ + fout = m * (freq / (p * (1 << s))); + } } return fout;
EXYNOS4 user manual equation for calculating PLL output is FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) hence updating accordingly. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> --- arch/arm/cpu/armv7/exynos/clock.c | 11 +++++++++-- 1 files changed, 9 insertions(+), 2 deletions(-)