Message ID | 55F83238.9090100@arm.com |
---|---|
State | New |
Headers | show |
On 15/09/15 15:59, Kyrill Tkachov wrote: > Hi all, > > After Marek's patch I see the bootstrap failure on arm: > gcc/config/arm/arm.c:4601:46: error: left shift of negative value > [-Werror=shift-negative-value] > && (val & (-1 << (32 - set_sign_bit_copies))) == val) > > I believe this is the right fix. Change -1 to HOST_WIDE_INT_M1U and > change the type of val from HOST_WIDE_INT to unsigned HOST_WIDE_INT. > This restores the bootstrap for me. > > Committing as obvious to restore bootstrap > > 2015-09-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > > * config/arm/arm.c (arm_gen_constant): Use HOST_WIDE_INT_M1U instead > of -1 when shifting. Change type of val to unsigned HOST_WIDE_INT. > Update prototype. > And I guess the next problem we're going to see is a warning that HOST_WIDE_INT has been silently coerced to unsigned by a prototype... Perhaps we should audit for that as well. OK. R. > arm-bootstrap-fix.patch > > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index 5f3180d..efb3a8b 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -95,7 +95,7 @@ static int arm_compute_static_chain_stack_bytes (void); > static arm_stack_offsets *arm_get_frame_offsets (void); > static void arm_add_gc_roots (void); > static int arm_gen_constant (enum rtx_code, machine_mode, rtx, > - HOST_WIDE_INT, rtx, rtx, int, int); > + unsigned HOST_WIDE_INT, rtx, rtx, int, int); > static unsigned bit_count (unsigned long); > static unsigned feature_count (const arm_feature_set*); > static int arm_address_register_rtx_p (rtx, int); > @@ -4227,8 +4227,8 @@ emit_constant_insn (rtx cond, rtx pattern) > > static int > arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, > - HOST_WIDE_INT val, rtx target, rtx source, int subtargets, > - int generate) > + unsigned HOST_WIDE_INT val, rtx target, rtx source, > + int subtargets, int generate) > { > int can_invert = 0; > int can_negate = 0; > @@ -4598,7 +4598,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, > mvn r0, r0, asl #12 > mvn r0, r0, lsr #12 */ > if (set_sign_bit_copies > 8 > - && (val & (-1 << (32 - set_sign_bit_copies))) == val) > + && (val & (HOST_WIDE_INT_M1U << (32 - set_sign_bit_copies))) == val) > { > if (generate) > { >
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 5f3180d..efb3a8b 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -95,7 +95,7 @@ static int arm_compute_static_chain_stack_bytes (void); static arm_stack_offsets *arm_get_frame_offsets (void); static void arm_add_gc_roots (void); static int arm_gen_constant (enum rtx_code, machine_mode, rtx, - HOST_WIDE_INT, rtx, rtx, int, int); + unsigned HOST_WIDE_INT, rtx, rtx, int, int); static unsigned bit_count (unsigned long); static unsigned feature_count (const arm_feature_set*); static int arm_address_register_rtx_p (rtx, int); @@ -4227,8 +4227,8 @@ emit_constant_insn (rtx cond, rtx pattern) static int arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, - HOST_WIDE_INT val, rtx target, rtx source, int subtargets, - int generate) + unsigned HOST_WIDE_INT val, rtx target, rtx source, + int subtargets, int generate) { int can_invert = 0; int can_negate = 0; @@ -4598,7 +4598,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, mvn r0, r0, asl #12 mvn r0, r0, lsr #12 */ if (set_sign_bit_copies > 8 - && (val & (-1 << (32 - set_sign_bit_copies))) == val) + && (val & (HOST_WIDE_INT_M1U << (32 - set_sign_bit_copies))) == val) { if (generate) {