| Message ID | alpine.DEB.2.02.1411191701190.12596@kaball.uk.xensource.com |
|---|---|
| State | New |
| Headers | show |
On Wed, Nov 19, 2014 at 05:44:49PM +0000, Stefano Stabellini wrote: > UIE being set can cause maintenance interrupts to occur when Xen writes > to one or more LR registers. The effect is a busy loop around the > interrupt handler in Xen > (http://marc.info/?l=xen-devel&m=141597517132682): everything gets stuck. > > Konrad, this fixes an actual bug, at least on OMAP5. It should have no > bad side effects on any other platforms as far as I can tell. It should > go in 4.5. Have you checked (aka ran the tests) on the other platforms? > > Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> > Tested-by: Andrii Tseglytskyi <andrii.tseglytskyi@globallogic.com> ^^^^^^^ 'Reported-and-Tested-by' > > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > index 70d10d6..df140b9 100644 > --- a/xen/arch/arm/gic.c > +++ b/xen/arch/arm/gic.c > @@ -403,6 +403,8 @@ void gic_clear_lrs(struct vcpu *v) > if ( is_idle_vcpu(v) ) > return; > > + gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 0); > + > spin_lock_irqsave(&v->arch.vgic.lock, flags); > > while ((i = find_next_bit((const unsigned long *) &this_cpu(lr_mask), > @@ -527,8 +529,6 @@ void gic_inject(void) > > if ( !list_empty(¤t->arch.vgic.lr_pending) && lr_all_full() ) > gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 1); > - else > - gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 0); > } > > static void do_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi)
On Wed, 19 Nov 2014, Konrad Rzeszutek Wilk wrote: > On Wed, Nov 19, 2014 at 05:44:49PM +0000, Stefano Stabellini wrote: > > UIE being set can cause maintenance interrupts to occur when Xen writes > > to one or more LR registers. The effect is a busy loop around the > > interrupt handler in Xen > > (http://marc.info/?l=xen-devel&m=141597517132682): everything gets stuck. > > > > Konrad, this fixes an actual bug, at least on OMAP5. It should have no > > bad side effects on any other platforms as far as I can tell. It should > > go in 4.5. > > Have you checked (aka ran the tests) on the other platforms? Yes, I tested on Midway and it runs fine. > > Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> > > Tested-by: Andrii Tseglytskyi <andrii.tseglytskyi@globallogic.com> > ^^^^^^^ > 'Reported-and-Tested-by' Good point > > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > > index 70d10d6..df140b9 100644 > > --- a/xen/arch/arm/gic.c > > +++ b/xen/arch/arm/gic.c > > @@ -403,6 +403,8 @@ void gic_clear_lrs(struct vcpu *v) > > if ( is_idle_vcpu(v) ) > > return; > > > > + gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 0); > > + > > spin_lock_irqsave(&v->arch.vgic.lock, flags); > > > > while ((i = find_next_bit((const unsigned long *) &this_cpu(lr_mask), > > @@ -527,8 +529,6 @@ void gic_inject(void) > > > > if ( !list_empty(¤t->arch.vgic.lr_pending) && lr_all_full() ) > > gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 1); > > - else > > - gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 0); > > } > > > > static void do_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi) >
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 70d10d6..df140b9 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -403,6 +403,8 @@ void gic_clear_lrs(struct vcpu *v) if ( is_idle_vcpu(v) ) return; + gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 0); + spin_lock_irqsave(&v->arch.vgic.lock, flags); while ((i = find_next_bit((const unsigned long *) &this_cpu(lr_mask), @@ -527,8 +529,6 @@ void gic_inject(void) if ( !list_empty(¤t->arch.vgic.lr_pending) && lr_all_full() ) gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 1); - else - gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 0); } static void do_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi)