| Message ID | 1356696525-21001-3-git-send-email-rajeshwari.s@samsung.com |
|---|---|
| State | New |
| Headers | show |
Hi Rajeshwari, On Fri, Dec 28, 2012 at 4:08 AM, Rajeshwari Shinde <rajeshwari.s@samsung.com> wrote: > This patch adds functions to intialsise power registers during > spl boot. > > Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> > --- > arch/arm/cpu/armv7/exynos/power.c | 34 ++++++++++++++++++++++++++++++ > arch/arm/include/asm/arch-exynos/power.h | 5 ++++ > 2 files changed, 39 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c > index d4bce6d..8ab43f4 100644 > --- a/arch/arm/cpu/armv7/exynos/power.c > +++ b/arch/arm/cpu/armv7/exynos/power.c > @@ -22,8 +22,15 @@ > */ > > #include <common.h> > +#include <errno.h> > +#include <i2c.h> > #include <asm/io.h> > #include <asm/arch/power.h> > +#include <asm/arch/spl.h> > +#include <power/max77686_pmic.h> > +#include <power/pmic.h> > +#include <asm/arch/periph.h> > +#include <asm/arch/pinmux.h> > > static void exynos4_mipi_phy_control(unsigned int dev_index, > unsigned int enable) > @@ -95,3 +102,30 @@ void set_dp_phy_ctrl(unsigned int enable) > if (cpu_is_exynos5()) > exynos5_dp_phy_control(enable); > } > + > +uint32_t power_read_reset_status(void) > +{ > + struct exynos5_power *power = > + (struct exynos5_power *)samsung_get_base_power(); > + > + return power->inform1; > +} > + > +void ps_hold_setup(void) > +{ > + struct exynos5_power *power = > + (struct exynos5_power *)samsung_get_base_power(); > + > + /* Set PS-Hold high */ > + setbits_le32(&power->ps_hold_control, > + EXYNOS_PS_HOLD_CONTROL_DATA_HIGH); > +} Suggest power_ps_hold_setup() so that the prefixes are consistent. > + > +void power_exit_wakeup(void) > +{ > + struct exynos5_power *power = > + (struct exynos5_power *)samsung_get_base_power(); > + typedef void (*resume_func)(void); > + > + ((resume_func)power->inform0)(); > +} > diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h > index d2fdb59..3e83f55 100644 > --- a/arch/arm/include/asm/arch-exynos/power.h > +++ b/arch/arm/include/asm/arch-exynos/power.h > @@ -864,4 +864,9 @@ void set_dp_phy_ctrl(unsigned int enable); > > #define EXYNOS_DP_PHY_ENABLE (1 << 0) > > +#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH (1 << 8) > + > +uint32_t power_read_reset_status(void); > +void ps_hold_setup(void); > +void power_exit_wakeup(void); Please can you add comments for these three functions > #endif > -- > 1.7.4.4 >
diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c index d4bce6d..8ab43f4 100644 --- a/arch/arm/cpu/armv7/exynos/power.c +++ b/arch/arm/cpu/armv7/exynos/power.c @@ -22,8 +22,15 @@ */ #include <common.h> +#include <errno.h> +#include <i2c.h> #include <asm/io.h> #include <asm/arch/power.h> +#include <asm/arch/spl.h> +#include <power/max77686_pmic.h> +#include <power/pmic.h> +#include <asm/arch/periph.h> +#include <asm/arch/pinmux.h> static void exynos4_mipi_phy_control(unsigned int dev_index, unsigned int enable) @@ -95,3 +102,30 @@ void set_dp_phy_ctrl(unsigned int enable) if (cpu_is_exynos5()) exynos5_dp_phy_control(enable); } + +uint32_t power_read_reset_status(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + return power->inform1; +} + +void ps_hold_setup(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + /* Set PS-Hold high */ + setbits_le32(&power->ps_hold_control, + EXYNOS_PS_HOLD_CONTROL_DATA_HIGH); +} + +void power_exit_wakeup(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + typedef void (*resume_func)(void); + + ((resume_func)power->inform0)(); +} diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h index d2fdb59..3e83f55 100644 --- a/arch/arm/include/asm/arch-exynos/power.h +++ b/arch/arm/include/asm/arch-exynos/power.h @@ -864,4 +864,9 @@ void set_dp_phy_ctrl(unsigned int enable); #define EXYNOS_DP_PHY_ENABLE (1 << 0) +#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH (1 << 8) + +uint32_t power_read_reset_status(void); +void ps_hold_setup(void); +void power_exit_wakeup(void); #endif
This patch adds functions to intialsise power registers during spl boot. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> --- arch/arm/cpu/armv7/exynos/power.c | 34 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/power.h | 5 ++++ 2 files changed, 39 insertions(+), 0 deletions(-)